This is a note to let you know that I've just added the patch titled
MIPS: Fix mips_atomic_set() with EVA
to the 4.4-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
mips-fix-mips_atomic_set-with-eva.patch
and it can be found in the queue-4.4 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 4915e1b043d6286928207b1f6968197b50407294 Mon Sep 17 00:00:00 2001
From: James Hogan <james.hogan@xxxxxxxxxx>
Date: Wed, 31 May 2017 16:19:49 +0100
Subject: MIPS: Fix mips_atomic_set() with EVA
From: James Hogan <james.hogan@xxxxxxxxxx>
commit 4915e1b043d6286928207b1f6968197b50407294 upstream.
EVA linked loads (LLE) and conditional stores (SCE) should be used on
EVA kernels for the MIPS_ATOMIC_SET operation of the sysmips system
call, or else the atomic set will apply to the kernel view of the
virtual address space (potentially unmapped on EVA kernels) rather than
the user view (TLB mapped).
Signed-off-by: James Hogan <james.hogan@xxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Patchwork: https://patchwork.linux-mips.org/patch/16151/
Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/mips/kernel/syscall.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -28,6 +28,7 @@
#include <linux/elf.h>
#include <asm/asm.h>
+#include <asm/asm-eva.h>
#include <asm/branch.h>
#include <asm/cachectl.h>
#include <asm/cacheflush.h>
@@ -138,9 +139,11 @@ static inline int mips_atomic_set(unsign
__asm__ __volatile__ (
" .set "MIPS_ISA_ARCH_LEVEL" \n"
" li %[err], 0 \n"
- "1: ll %[old], (%[addr]) \n"
+ "1: \n"
+ user_ll("%[old]", "(%[addr])")
" move %[tmp], %[new] \n"
- "2: sc %[tmp], (%[addr]) \n"
+ "2: \n"
+ user_sc("%[tmp]", "(%[addr])")
" beqz %[tmp], 4f \n"
"3: \n"
" .insn \n"
Patches currently in stable-queue which might be from james.hogan@xxxxxxxxxx are
queue-4.4/mips-send-sigill-for-bposge32-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-actually-decode-jalx-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-fix-mips_atomic_set-retry-condition.patch
queue-4.4/mips-fix-a-typo-s-preset-present-in-r2-to-r6-emulation-error-message.patch
queue-4.4/mips-fix-mips_atomic_set-with-eva.patch
queue-4.4/mips-save-static-registers-before-sysmips.patch
queue-4.4/mips-fix-unaligned-pc-interpretation-in-compute_return_epc.patch
queue-4.4/mips-fix-mips-i-isa-proc-cpuinfo-reporting.patch
queue-4.4/mips-rename-sigill_r6-to-sigill_r2r6-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-negate-error-syscall-return-in-trace.patch
queue-4.4/mips-send-sigill-for-linked-branches-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-math-emu-prevent-wrong-isa-mode-instruction-emulation.patch