Re: [PATCH for v4.9 LTS 064/111] ARM64: dts: meson-gxbb-odroidc2: fix GbE tx link breakage

[Jerome Brunet <jbrunet@xxxxxxxxxxxx>]

On Sun, 2017-06-04 at 08:12 +0000, Levin, Alexander (Sasha Levin) wrote:
> From: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> 
> [ Upstream commit feb3cbea0946c67060e2d5bcb7499b0a6f6700fe ]
> 
> OdroidC2 GbE link breaks under heavy tx transfer. This happens even if the
> MAC does not enable Energy Efficient Ethernet (No Low Power state Idle on
> the Tx path). The problem seems to come from the phy Rx path, entering the
> LPI state.
> 
> Disabling EEE advertisement on the phy prevent this feature to be
> negociated with the link partner and solve the issue.
> 
> Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> Signed-off-by: Kevin Hilman <khilman@xxxxxxxxxxxx>
> Signed-off-by: Arnd Bergmann <arnd@xxxxxxxx>
> Signed-off-by: Sasha Levin <alexander.levin@xxxxxxxxxxx>

Alexander,

unfortunately, this dt change alone won't fix the problem. The code related to
eee-broken-**** has been merged into mainline around the same time as this
particular change.

For this flag to actually do something you'll need the following commits:

d853d145ea3e63387a2ac759aa41d5e43876e561
1fc31357ad194fb98691f3d122bcd47e59239e83
3bb9ab63276696988d8224f52db20e87194deb4b
57f3986231bb2c69a55ccab1d2b30a00818027ac
308d3165d8b2b98d3dc3d97d6662062735daea67

Cheers

Jerome

> ---
>  arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
> b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
> index e6e3491d48a5..f150a4c63efe 100644
> --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
> +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
> @@ -85,6 +85,18 @@
>  	status = "okay";
>  	pinctrl-0 = <&eth_pins>;
>  	pinctrl-names = "default";
> +	phy-handle = <&eth_phy0>;
> +
> +	mdio {
> +		compatible = "snps,dwmac-mdio";
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		eth_phy0: ethernet-phy@0 {
> +			reg = <0>;
> +			eee-broken-1000t;
> +		};
> +	};
>  };
>  
>  &ir {