gregkh@xxxxxxxxxxxxxxxxxxx writes:
> The patch below does not apply to the 4.4-stable tree.
> If someone wants it applied there, or to any other stable or longterm
> tree, then please email the backport, including the original git commit
> id to <stable@xxxxxxxxxxxxxxx>.
Hi Greg,
Here's a backport to 4.4 at least, and probably earlier. Do you want a
separate backport patch for each stable tree?
cheers
From: Oliver O'Halloran <oohall@xxxxxxxxx>
Date: Mon, 3 Apr 2017 13:25:12 +1000
Subject: [PATCH] powerpc/64: Fix flush_(d|i)cache_range() called from modules
commit 8f5f525d5b83f7d76a6baf9c4e94d4bf312ea7f6 upstream.
When the kernel is compiled to use 64bit ABIv2 the _GLOBAL() macro does
not include a global entry point. A function's global entry point is
used when the function is called from a different TOC context and in the
kernel this typically means a call from a module into the vmlinux (or
vice-versa).
There are a few exported asm functions declared with _GLOBAL() and
calling them from a module will likely crash the kernel since any TOC
relative load will yield garbage.
flush_icache_range() and flush_dcache_range() are both exported to
modules, and use the TOC, so must use _GLOBAL_TOC().
[mpe: We can't use _GLOBAL_TOC() in 4.4 for flush_icache_range() because
it needs to be in the .kprobes.text section, handled by the _KPROBE()
macro. We don't have a _KPROBE_TOC() macro, so just open code the TOC
initialisation.]
Fixes: 721aeaa9fdf3 ("powerpc: Build little endian ppc64 kernel with ABIv2")
Signed-off-by: Oliver O'Halloran <oohall@xxxxxxxxx>
Signed-off-by: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
---
arch/powerpc/kernel/misc_64.S | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index db475d41b57a..06a1697e1fcf 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -67,6 +67,9 @@ PPC64_CACHES:
*/
_KPROBE(flush_icache_range)
+0: addis r2,r12,(.TOC. - 0b)@ha
+ addi r2, r2,(.TOC. - 0b)@l
+ .localentry flush_icache_range, . - flush_icache_range
BEGIN_FTR_SECTION
PURGE_PREFETCHED_INS
blr
@@ -117,7 +120,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
*
* flush all bytes from start to stop-1 inclusive
*/
-_GLOBAL(flush_dcache_range)
+_GLOBAL_TOC(flush_dcache_range)
/*
* Flush the data cache to memory
--
2.7.4