This is a note to let you know that I've just added the patch titled MIPS: c-r4k: Fix Loongson-3's vcache/scache waysize calculation to the 4.10-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: mips-c-r4k-fix-loongson-3-s-vcache-scache-waysize-calculation.patch and it can be found in the queue-4.10 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From 0be032c190abcdcfa948082b6a1e0d461184ba4d Mon Sep 17 00:00:00 2001 From: Huacai Chen <chenhc@xxxxxxxxxx> Date: Thu, 16 Mar 2017 21:00:29 +0800 Subject: MIPS: c-r4k: Fix Loongson-3's vcache/scache waysize calculation From: Huacai Chen <chenhc@xxxxxxxxxx> commit 0be032c190abcdcfa948082b6a1e0d461184ba4d upstream. If scache.waysize is 0, r4k___flush_cache_all() will do nothing and then cause bugs. BTW, though vcache.waysize isn't being used by now, we also fix its calculation. Signed-off-by: Huacai Chen <chenhc@xxxxxxxxxx> Cc: John Crispin <john@xxxxxxxxxxx> Cc: Steven J . Hill <Steven.Hill@xxxxxxxxxxxxxxxxxx> Cc: Fuxin Zhang <zhangfx@xxxxxxxxxx> Cc: Zhangjin Wu <wuzhangjin@xxxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx Patchwork: https://patchwork.linux-mips.org/patch/15756/ Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/mips/mm/c-r4k.c | 2 ++ 1 file changed, 2 insertions(+) --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1558,6 +1558,7 @@ static void probe_vcache(void) vcache_size = c->vcache.sets * c->vcache.ways * c->vcache.linesz; c->vcache.waybit = 0; + c->vcache.waysize = vcache_size / c->vcache.ways; pr_info("Unified victim cache %ldkB %s, linesize %d bytes.\n", vcache_size >> 10, way_string[c->vcache.ways], c->vcache.linesz); @@ -1660,6 +1661,7 @@ static void __init loongson3_sc_init(voi /* Loongson-3 has 4 cores, 1MB scache for each. scaches are shared */ scache_size *= 4; c->scache.waybit = 0; + c->scache.waysize = scache_size / c->scache.ways; pr_info("Unified secondary cache %ldkB %s, linesize %d bytes.\n", scache_size >> 10, way_string[c->scache.ways], c->scache.linesz); if (scache_size) Patches currently in stable-queue which might be from chenhc@xxxxxxxxxx are queue-4.10/mips-flush-wrong-invalid-ftlb-entry-for-huge-page.patch queue-4.10/mips-check-tlb-before-handle_ri_rdhwr-for-loongson-3.patch queue-4.10/mips-c-r4k-fix-loongson-3-s-vcache-scache-waysize-calculation.patch queue-4.10/mips-add-mips_cpu_ftlb-for-loongson-3a-r2.patch