Patch "drm/radeon: align VM PTBs (Page Table Blocks) to 32K" has been added to the 3.10-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/radeon: align VM PTBs (Page Table Blocks) to 32K

to the 3.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-radeon-align-vm-ptbs-page-table-blocks-to-32k.patch
and it can be found in the queue-3.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 1c01103cb90197900beb534911de558d7a43d0b3 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@xxxxxxx>
Date: Fri, 12 Jul 2013 15:56:02 -0400
Subject: drm/radeon: align VM PTBs (Page Table Blocks) to 32K

From: Alex Deucher <alexander.deucher@xxxxxxx>

commit 1c01103cb90197900beb534911de558d7a43d0b3 upstream.

Covers requirements of all current asics.

Reviewed-by: Christian König <christian.koenig@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 drivers/gpu/drm/radeon/radeon.h      |    5 +++++
 drivers/gpu/drm/radeon/radeon_gart.c |   12 ++++++------
 2 files changed, 11 insertions(+), 6 deletions(-)

--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -695,6 +695,11 @@ struct radeon_ring {
 /* number of entries in page table */
 #define RADEON_VM_PTE_COUNT (1 << RADEON_VM_BLOCK_SIZE)
 
+/* PTBs (Page Table Blocks) need to be aligned to 32K */
+#define RADEON_VM_PTB_ALIGN_SIZE   32768
+#define RADEON_VM_PTB_ALIGN_MASK (RADEON_VM_PTB_ALIGN_SIZE - 1)
+#define RADEON_VM_PTB_ALIGN(a) (((a) + RADEON_VM_PTB_ALIGN_MASK) & ~RADEON_VM_PTB_ALIGN_MASK)
+
 struct radeon_vm {
 	struct list_head		list;
 	struct list_head		va;
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -466,8 +466,8 @@ int radeon_vm_manager_init(struct radeon
 		size += rdev->vm_manager.max_pfn * 8;
 		size *= 2;
 		r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
-					      RADEON_GPU_PAGE_ALIGN(size),
-					      RADEON_GPU_PAGE_SIZE,
+					      RADEON_VM_PTB_ALIGN(size),
+					      RADEON_VM_PTB_ALIGN_SIZE,
 					      RADEON_GEM_DOMAIN_VRAM);
 		if (r) {
 			dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n",
@@ -621,10 +621,10 @@ int radeon_vm_alloc_pt(struct radeon_dev
 	}
 
 retry:
-	pd_size = RADEON_GPU_PAGE_ALIGN(radeon_vm_directory_size(rdev));
+	pd_size = RADEON_VM_PTB_ALIGN(radeon_vm_directory_size(rdev));
 	r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
 			     &vm->page_directory, pd_size,
-			     RADEON_GPU_PAGE_SIZE, false);
+			     RADEON_VM_PTB_ALIGN_SIZE, false);
 	if (r == -ENOMEM) {
 		r = radeon_vm_evict(rdev, vm);
 		if (r)
@@ -953,8 +953,8 @@ static int radeon_vm_update_pdes(struct
 retry:
 		r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
 				     &vm->page_tables[pt_idx],
-				     RADEON_VM_PTE_COUNT * 8,
-				     RADEON_GPU_PAGE_SIZE, false);
+				     RADEON_VM_PTB_ALIGN(RADEON_VM_PTE_COUNT * 8),
+				     RADEON_VM_PTB_ALIGN_SIZE, false);
 
 		if (r == -ENOMEM) {
 			r = radeon_vm_evict(rdev, vm);


Patches currently in stable-queue which might be from alexander.deucher@xxxxxxx are

queue-3.10/drm-radeon-fix-combios-tables-on-older-cards.patch
queue-3.10/drm-radeon-align-vm-ptbs-page-table-blocks-to-32k.patch
queue-3.10/drm-radeon-fix-uvd-fence-emit.patch
queue-3.10/drm-radeon-fix-endian-issues-with-dp-handling-v3.patch
queue-3.10/drm-radeon-another-card-with-wrong-primary-dac-adj.patch
queue-3.10/drm-radeon-improve-dac-adjust-heuristics-for-legacy-pdac.patch
queue-3.10/drm-radeon-allow-selection-of-alignment-in-the-sub-allocator.patch
queue-3.10/drm-radeon-vm-only-align-the-pt-base-to-32k.patch
queue-3.10/drm-radeon-hdmi-make-sure-we-have-an-afmt-block-assigned.patch
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