On Mon, Jan 09, 2017 at 09:26:34AM +0100, gregkh@xxxxxxxxxxxxxxxxxxx wrote:
>
>The patch below does not apply to the 4.9-stable tree.
>If someone wants it applied there, or to any other stable or longterm
>tree, then please email the backport, including the original git commit
>id to <stable@xxxxxxxxxxxxxxx>.
>
>thanks,
>
>greg k-h
This patch fixes a commit in the current 4.10-rc tree; the relevant
commit is not present in the 4.9-stable tree.
I apologize for the confusion. In the future I'll try to be more
explicit whether fixes should be applied to the stable tree.
William Breathitt Gray
>
>------------------ original commit in Linus's tree ------------------
>
>From 47af2c676ae1e84140225d261a00bdf88f1f9f7e Mon Sep 17 00:00:00 2001
>From: William Breathitt Gray <vilhelm.gray@xxxxxxxxx>
>Date: Mon, 28 Nov 2016 16:22:44 -0500
>Subject: [PATCH] iio: 104-quad-8: Fix index control configuration
>
>The LS7266R1 requires bits 5 & 6 to be high in order to select the Index
>Control Register. This patch fixes a typo that incorrectly selects the
>Input/Output Control Register where the Index Control Register was
>desired.
>
>Fixes: 28e5d3bb0325 ("iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8")
>Signed-off-by: William Breathitt Gray <vilhelm.gray@xxxxxxxxx>
>Cc: <Stable@xxxxxxxxxxxxxxx>
>Signed-off-by: Jonathan Cameron <jic23@xxxxxxxxxx>
>
>diff --git a/drivers/iio/counter/104-quad-8.c b/drivers/iio/counter/104-quad-8.c
>index 2d2ee353dde7..c0a69d7e9ce7 100644
>--- a/drivers/iio/counter/104-quad-8.c
>+++ b/drivers/iio/counter/104-quad-8.c
>@@ -362,7 +362,7 @@ static int quad8_set_synchronous_mode(struct iio_dev *indio_dev,
> priv->synchronous_mode[chan->channel] = synchronous_mode;
>
> /* Load Index Control configuration to Index Control Register */
>- outb(0x40 | idr_cfg, base_offset);
>+ outb(0x60 | idr_cfg, base_offset);
>
> return 0;
> }
>@@ -444,7 +444,7 @@ static int quad8_set_index_polarity(struct iio_dev *indio_dev,
> priv->index_polarity[chan->channel] = index_polarity;
>
> /* Load Index Control configuration to Index Control Register */
>- outb(0x40 | idr_cfg, base_offset);
>+ outb(0x60 | idr_cfg, base_offset);
>
> return 0;
> }
>
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