On Sun, 25 Dec 2016, Hans de Goede <hdegoede@xxxxxxxxxx> wrote:
> If there is no OPREGION_ASLE_EXT then a VBT stored in mailbox #4 may
> use the ASLE_EXT parts of the opregion. Adjust the vbt_size calculation
> for a vbt in mailbox #4 for this.
>
> This fixes the driver not finding the VBT on a jumper ezpad mini3
> cherrytrail tablet.
Thanks for the patch. I think you're onto something, but I don't think
the patch is quite correct. That said, I'm not sure myself yet what
would be. ;)
Without the change, does intel_bios_is_valid_vbt() return true anyway?
I.e. do you get "Found valid VBT in ACPI OpRegion (Mailbox #4)\n" in
log? If not, which of the debug messages in intel_bios_is_valid_vbt() do
you get?
In the latter case, I suspect you'll end up with failure in intel_bios.c
with either "No MIPI config BDB found" or "No MIPI Sequence found,
parsing complete\n".
BR,
Jani.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Hans de Goede <hdegoede@xxxxxxxxxx>
> ---
> Note even with this fixed the panel still does not work with 4.9,
> but it does with drm-intel-next-queued :) I believe the missing bit in
> 4.9 is the "drm/915: Parsing the missed out DTD fields from the VBT"
> commit, but I've not verified this.
> ---
> drivers/gpu/drm/i915/intel_opregion.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_opregion.c b/drivers/gpu/drm/i915/intel_opregion.c
> index f4429f6..eff35ae 100644
> --- a/drivers/gpu/drm/i915/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/intel_opregion.c
> @@ -982,7 +982,9 @@ int intel_opregion_setup(struct drm_i915_private *dev_priv)
> opregion->vbt_size = vbt_size;
> } else {
> vbt = base + OPREGION_VBT_OFFSET;
> - vbt_size = OPREGION_ASLE_EXT_OFFSET - OPREGION_VBT_OFFSET;
> + vbt_size = (mboxes & MBOX_ASLE_EXT) ?
> + OPREGION_ASLE_EXT_OFFSET : OPREGION_SIZE;
> + vbt_size -= OPREGION_VBT_OFFSET;
> if (intel_bios_is_valid_vbt(vbt, vbt_size)) {
> DRM_DEBUG_KMS("Found valid VBT in ACPI OpRegion (Mailbox #4)\n");
> opregion->vbt = vbt;
--
Jani Nikula, Intel Open Source Technology Center
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