Re: [Intel-gfx] [PATCH 5/9] drm/i915/gen9: minimum scanlines for Y tile is not always 4

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Hi,

On 22/09/2016 22:00, Paulo Zanoni wrote:
During watermarks calculations, this value is used in 3 different
places. Only one of them was not using a hardcoded 4. Move the code up
so everybody can benefit from the actual value.

This should only help on situations with Y tiling + 90/270 rotation +
1 or 2 bpp or NV12.

I don't think bothering stable with this was required since 90/270 on NV12 was never fully enabled AFAIR. Unless Ville accidentaly enabled it in his recent rewrite? But it was not put in due instability issues so I hope not.

Regards,

Tvrtko

Cc: stable@xxxxxxxxxxxxxxx
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@xxxxxxxxxxxxxxx>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@xxxxxxxxx>
---
  drivers/gpu/drm/i915/intel_pm.c | 56 +++++++++++++++++++++++------------------
  1 file changed, 32 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ee561c2..a7f5f7f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3495,7 +3495,8 @@ static uint32_t skl_wm_method1(uint32_t pixel_rate, uint8_t cpp, uint32_t latenc
static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
  			       uint32_t horiz_pixels, uint8_t cpp,
-			       uint64_t tiling, uint32_t latency)
+			       uint64_t tiling, uint32_t latency,
+			       uint32_t y_min_scanlines)
  {
  	uint32_t ret;
  	uint32_t plane_bytes_per_line, plane_blocks_per_line;
@@ -3508,9 +3509,9 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal,
if (tiling == I915_FORMAT_MOD_Y_TILED ||
  	    tiling == I915_FORMAT_MOD_Yf_TILED) {
-		plane_bytes_per_line *= 4;
+		plane_bytes_per_line *= y_min_scanlines;
  		plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512);
-		plane_blocks_per_line /= 4;
+		plane_blocks_per_line /= y_min_scanlines;
  	} else if (tiling == DRM_FORMAT_MOD_NONE) {
  		plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512) + 1;
  	} else {
@@ -3567,6 +3568,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
  	uint8_t cpp;
  	uint32_t width = 0, height = 0;
  	uint32_t plane_pixel_rate;
+	uint32_t y_min_scanlines;
if (latency == 0 || !cstate->base.active || !intel_pstate->base.visible) {
  		*enabled = false;
@@ -3582,38 +3584,44 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
  	cpp = drm_format_plane_cpp(fb->pixel_format, 0);
  	plane_pixel_rate = skl_adjusted_plane_pixel_rate(cstate, intel_pstate);
+ if (intel_rotation_90_or_270(pstate->rotation)) {
+		int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ?
+			drm_format_plane_cpp(fb->pixel_format, 1) :
+			drm_format_plane_cpp(fb->pixel_format, 0);
+
+		switch (cpp) {
+		case 1:
+			y_min_scanlines = 16;
+			break;
+		case 2:
+			y_min_scanlines = 8;
+			break;
+		default:
+			WARN(1, "Unsupported pixel depth for rotation");
+		case 4:
+			y_min_scanlines = 4;
+			break;
+		}
+	} else {
+		y_min_scanlines = 4;
+	}
+
  	method1 = skl_wm_method1(plane_pixel_rate, cpp, latency);
  	method2 = skl_wm_method2(plane_pixel_rate,
  				 cstate->base.adjusted_mode.crtc_htotal,
  				 width,
  				 cpp,
  				 fb->modifier[0],
-				 latency);
+				 latency,
+				 y_min_scanlines);
plane_bytes_per_line = width * cpp;
  	plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512);
if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||
  	    fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) {
-		uint32_t min_scanlines = 4;
-		uint32_t y_tile_minimum;
-		if (intel_rotation_90_or_270(pstate->rotation)) {
-			int cpp = (fb->pixel_format == DRM_FORMAT_NV12) ?
-				drm_format_plane_cpp(fb->pixel_format, 1) :
-				drm_format_plane_cpp(fb->pixel_format, 0);
-
-			switch (cpp) {
-			case 1:
-				min_scanlines = 16;
-				break;
-			case 2:
-				min_scanlines = 8;
-				break;
-			case 8:
-				WARN(1, "Unsupported pixel depth for rotation");
-			}
-		}
-		y_tile_minimum = plane_blocks_per_line * min_scanlines;
+		uint32_t y_tile_minimum = plane_blocks_per_line *
+					  y_min_scanlines;
  		selected_result = max(method2, y_tile_minimum);
  	} else {
  		if ((ddb_allocation / plane_blocks_per_line) >= 1)
@@ -3628,7 +3636,7 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv,
  	if (level >= 1 && level <= 7) {
  		if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||
  		    fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED)
-			res_lines += 4;
+			res_lines += y_min_scanlines;
  		else
  			res_blocks++;
  	}

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