Re: [Intel-gfx] [PATCH] drm/i915: Unconditionally flush any chipset buffers before execbuf

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes:

> If userspace is asynchronously streaming into the batch or other
> execobjects, we may not flush those writes along with a change in cache
> domain (as there is no change). Therefore those writes may end up in
> internal chipset buffers and not visible to the GPU upon execution. We
> must issue a flush command or otherwise we encounter incoherency in the
> batchbuffers and the GPU executing invalid commands (i.e. hanging) quite
> regularly.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90841
> Fixes: 1816f9236303 ("drm/i915: Support creation of unbound wc user...")
> Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Cc: Akash Goel <akash.goel@xxxxxxxxx>
> Cc: Daniel Vetter <daniel.vetter@xxxxxxxx>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@xxxxxxxxxxxxxxx>
> Tested-by: Matti Hämäläinen <ccr@xxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx
> ---
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c | 10 +++-------
>  1 file changed, 3 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index 699315304748..75957aef6219 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1016,7 +1016,6 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
>  	const unsigned int other_rings = eb_other_engines(req);
>  	struct i915_vma *vma;
>  	uint32_t flush_domains = 0;

You don't need flush_domains, with this version.

> -	bool flush_chipset = false;
>  	int ret;
>  
>  	list_for_each_entry(vma, vmas, exec_list) {
> @@ -1029,16 +1028,13 @@ i915_gem_execbuffer_move_to_gpu(struct drm_i915_gem_request *req,
>  		}
>  
>  		if (obj->base.write_domain & I915_GEM_DOMAIN_CPU)
> -			flush_chipset |= i915_gem_clflush_object(obj, false);
> +			i915_gem_clflush_object(obj, false);
>  
>  		flush_domains |= obj->base.write_domain;
>  	}
>  
> -	if (flush_chipset)
> -		i915_gem_chipset_flush(req->engine->i915);
> -
> -	if (flush_domains & I915_GEM_DOMAIN_GTT)
> -		wmb();
> +	/* Unconditionally flush any chipset caches (for streaming writes). */
> +	i915_gem_chipset_flush(req->engine->i915);
>  
>  	/* Unconditionally invalidate GPU caches and TLBs. */
>  	return req->engine->emit_flush(req, EMIT_INVALIDATE);
> -- 
> 2.8.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
To unsubscribe from this list: send the line "unsubscribe stable" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html



[Index of Archives]     [Linux Kernel]     [Kernel Development Newbies]     [Linux USB Devel]     [Video for Linux]     [Linux Audio Users]     [Yosemite Hiking]     [Linux Kernel]     [Linux SCSI]