This is a note to let you know that I've just added the patch titled
MIPS: Flush highmem pages in __flush_dcache_page
to the 4.5-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
mips-flush-highmem-pages-in-__flush_dcache_page.patch
and it can be found in the queue-4.5 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 234859e49a15323cf1b2331bdde7f658c4cb45fb Mon Sep 17 00:00:00 2001
From: Paul Burton <paul.burton@xxxxxxxxxx>
Date: Tue, 1 Mar 2016 02:37:57 +0000
Subject: MIPS: Flush highmem pages in __flush_dcache_page
From: Paul Burton <paul.burton@xxxxxxxxxx>
commit 234859e49a15323cf1b2331bdde7f658c4cb45fb upstream.
When flush_dcache_page is called on an executable page, that page is
about to be provided to userland & we can presume that the icache
contains no valid entries for its address range. However if the icache
does not fill from the dcache then we cannot presume that the pages
content has been written back as far as the memories that the dcache
will fill from (ie. L2 or further out).
This was being done for lowmem pages, but not for highmem which can lead
to icache corruption. Fix this by mapping highmem pages & flushing their
content from the dcache in __flush_dcache_page before providing the page
to userland, just as is done for lowmem pages.
Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
Cc: Lars Persson <lars.persson@xxxxxxxx>
Cc: Andrew Morton <akpm@xxxxxxxxxxxxxxxxxxxx>
Cc: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Cc: linux-kernel@xxxxxxxxxxxxxxx
Patchwork: https://patchwork.linux-mips.org/patch/12720/
Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/mips/mm/cache.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -16,6 +16,7 @@
#include <linux/mm.h>
#include <asm/cacheflush.h>
+#include <asm/highmem.h>
#include <asm/processor.h>
#include <asm/cpu.h>
#include <asm/cpu-features.h>
@@ -83,8 +84,6 @@ void __flush_dcache_page(struct page *pa
struct address_space *mapping = page_mapping(page);
unsigned long addr;
- if (PageHighMem(page))
- return;
if (mapping && !mapping_mapped(mapping)) {
SetPageDcacheDirty(page);
return;
@@ -95,8 +94,15 @@ void __flush_dcache_page(struct page *pa
* case is for exec env/arg pages and those are %99 certainly going to
* get faulted into the tlb (and thus flushed) anyways.
*/
- addr = (unsigned long) page_address(page);
+ if (PageHighMem(page))
+ addr = (unsigned long)kmap_atomic(page);
+ else
+ addr = (unsigned long)page_address(page);
+
flush_data_cache_page(addr);
+
+ if (PageHighMem(page))
+ __kunmap_atomic((void *)addr);
}
EXPORT_SYMBOL(__flush_dcache_page);
Patches currently in stable-queue which might be from paul.burton@xxxxxxxxxx are
queue-4.5/mips-disable-preemption-during-prctl-pr_set_fp_mode.patch
queue-4.5/mips-flush-highmem-pages-in-__flush_dcache_page.patch
queue-4.5/mips-fix-sigreturn-via-vdso-on-micromips-kernel.patch
queue-4.5/mips-handle-highmem-pages-in-__update_cache.patch
queue-4.5/mips-fix-watchpoint-restoration.patch
queue-4.5/mips-build-micromips-vdso-for-micromips-kernels.patch
queue-4.5/mips-math-emu-fix-jalr-emulation-when-rd-0.patch
queue-4.5/mips-sync-icache-dcache-in-set_pte_at.patch
queue-4.5/mips-fix-msa-ld_-st_-asm-macros-to-use-ptr_addu.patch
queue-4.5/mips-prevent-restoration-of-msa-context-in-non-msa-kernels.patch
queue-4.5/mips-use-copy_s.fmt-rather-than-copy_u.fmt.patch
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