From: Fabio Estevam <fabio.estevam@xxxxxxxxxxxxx>
On a mx6 quad-core processor:
$ cat /proc/cpuinfo
processor : 0
model name : ARMv7 Processor rev 10 (v7l)
BogoMIPS : 1581.05
Features : swp half thumb fastmult vfp edsp neon vfpv3 tls
CPU implementer : 0x41
CPU architecture: 7
CPU variant : 0x2
CPU part : 0xc09
CPU revision : 10
,which incorrectly shows this is a single core device.
Commit a0ae0240 (ARM: kernel: add device tree init map function) introduced the
following requirement according to Documentation/devicetree/bindings/arm/cpus.txt:
"For the ARM architecture every CPU node must contain the following properties:
- device_type: must be "cpu"
Pass the 'device_type' property for each cpu node, so that we can have all the
four cores correctly reported again.
Cc: <stable@xxxxxxxxxxxxxxx> #3.10
Reported-by: Mike Loebl <mloebl@xxxxxxxxx>
Signed-off-by: Fabio Estevam <fabio.estevam@xxxxxxxxxxxxx>
---
Changes since v1:
- Add missing ";" in the dual-lite .dtsi
arch/arm/boot/dts/imx6dl.dtsi | 2 ++
arch/arm/boot/dts/imx6q.dtsi | 4 ++++
2 files changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index 5bcdf3a..62dc781 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -18,12 +18,14 @@
cpu@0 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
};
cpu@1 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 21e6758..dc54a72 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -18,6 +18,7 @@
cpu@0 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
operating-points = <
@@ -39,18 +40,21 @@
cpu@1 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};
cpu@2 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <2>;
next-level-cache = <&L2>;
};
cpu@3 {
compatible = "arm,cortex-a9";
+ device_type = "cpu";
reg = <3>;
next-level-cache = <&L2>;
};
--
1.8.1.2
--
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