Re: [Intel-gfx] [PATCH 2/7] drm/i915/psr: Try to program link training times correctly

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On Wed, May 18, 2016 at 08:04:02PM +0200, Daniel Vetter wrote:
> On Wed, May 18, 2016 at 7:39 PM, Ville Syrjälä
> <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> > On Wed, May 18, 2016 at 06:47:11PM +0200, Daniel Vetter wrote:
> >> Oops. Hw default for programming these fields to 0 is "skip link
> >> training". Display won't take that too well usually.
> >
> > s/skip/500 usec/
> 
> Yeah, my reading skills have reached an all time low ;-) But we
> confirmed on irc that the hardcoded 500usec was indeed wrong, since
> the fixed machines now run on 2.5ms of link training time. I'll update
> the commit message when merging to reflect that. Also
> 
> Tested-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>

That can be slapped onto the entire series.

> Tested-by: fritsch@xxxxxxx
> -- 
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch

-- 
Ville Syrjälä
Intel OTC
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