Re: [PATCH 3.14 75/76] perf/x86/intel: Use PAGE_SIZE for PEBS buffer size on Core2

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On 04/10/2016, 08:37 PM, Greg Kroah-Hartman wrote:
> 3.14-stable review patch.  If anyone has any objections, please let me know.
> 
> ------------------
> 
> From: Jiri Olsa <jolsa@xxxxxxxxxx>
> 
> commit 3135a66b768c5ee84c8a98b21d0330dc1c1234b4 upstream.

Where does this come from?

fatal: bad object 3135a66b768c5ee84c8a98b21d0330dc1c1234b4

The same for the later perf patch.

> Using PAGE_SIZE buffers makes the WRMSR to PERF_GLOBAL_CTRL in
> intel_pmu_enable_all() mysteriously hang on Core2. As a workaround, we
> don't do this.
> 
> The hard lockup is easily triggered by running 'perf test attr'
> repeatedly. Most of the time it gets stuck on sample session with
> small periods.
> 
>   # perf test attr -vv
>   14: struct perf_event_attr setup                             :
>   --- start ---
>   ...
>     'PERF_TEST_ATTR=/tmp/tmpuEKz3B /usr/bin/perf record -o /tmp/tmpuEKz3B/perf.data -c 123 kill >/dev/null 2>&1' ret 1
> 
> Reported-by: Arnaldo Carvalho de Melo <acme@xxxxxxxxxx>
> Signed-off-by: Jiri Olsa <jolsa@xxxxxxxxxx>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
> Reviewed-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>
> Cc: Alexander Shishkin <alexander.shishkin@xxxxxxxxxxxxxxx>
> Cc: Jiri Olsa <jolsa@xxxxxxxxxx>
> Cc: Kan Liang <kan.liang@xxxxxxxxx>
> Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
> Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
> Cc: Stephane Eranian <eranian@xxxxxxxxxx>
> Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> Cc: Vince Weaver <vincent.weaver@xxxxxxxxx>
> Cc: Wang Nan <wangnan0@xxxxxxxxxx>
> Link: http://lkml.kernel.org/r/20160301190352.GA8355@xxxxxxxxxxxxxxxx
> Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
> ---
>  arch/x86/kernel/cpu/perf_event.h          |    1 +
>  arch/x86/kernel/cpu/perf_event_intel_ds.c |   13 +++++++++++--
>  2 files changed, 12 insertions(+), 2 deletions(-)

thanks,
-- 
js
suse labs
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