On Wed, Feb 10, 2016 at 03:48:01PM -0600, Jay Cornwall wrote: > The AMD Family 15h Models 30h-3Fh (Kaveri) BIOS and Kernel Developer's > Guide omitted part of the BIOS IOMMU L2 register setup specification. > Without this setup the IOMMU L2 does not fully respect write permissions > when handling an ATS translation request. > > The IOMMU L2 will set PTE dirty bit when handling an ATS translation with > write permission request, even when PTE RW bit is clear. This may occur by > direct translation (which would cause a PPR) or by prefetch request from > the ATC. > > This is observed in practice when the IOMMU L2 modifies a PTE which maps a > pagecache page. The ext4 filesystem driver BUGs when asked to writeback > these (non-modified) pages. > > Enable ATS write permission check in the Kaveri IOMMU L2 if BIOS has not. > > Signed-off-by: Jay Cornwall <jay@xxxxxxxxxxxx> > Cc: <stable@xxxxxxxxxxxxxxx> # v3.19+ > --- > drivers/iommu/amd_iommu_init.c | 29 +++++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+) Applied, thanks. -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html