On Sat, 26 Sep, at 10:20:22AM, H. Peter Anvin wrote: > > I think it "works" because the affected BIOSes don't put spaces > between the chunks. I have discussed this with Matt. Right, that's very true. Though note that the current mapping algorithm will handle a gap <= PMD_SIZE, it's just anything larger than PMD_SIZE we "squash" to the next multiple of PMD_SIZE. It's unclear whether the firmware toolchains would even support references between sections with a PMD_SIZE gap between them, and I think the firmware engineers would have to go out of their way to actually insert such a gap. -- Matt Fleming, Intel Open Source Technology Center -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html