Re: [Intel-gfx] [PATCH] drm/i915: Fix pipe enabled mask for pipe C in WM calculations

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On Wed, Mar 20, 2013 at 11:39 PM, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote:
> On Wed, Mar 20, 2013 at 11:05:37PM +0100, Daniel Vetter wrote:
>> On Wed, Mar 20, 2013 at 09:51:05PM +0200, ville.syrjala@xxxxxxxxxxxxxxx wrote:
>> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>> >
>> > Cc: stable@xxxxxxxxxxxxxxx
>>
>> One of the stable rules is that patches should fix real issues. So can you
>> please hunt through bugzillas quickly and feed this to relevant bug
>> reports?
>
> It would take an astute user to notice that his machine was not using a
> lower power self-refresh FIFO mode. And the number of machines that only
> set up the third pipe is going to be small, so the impact minor. It
> will not fix any of the three pipe issues we have open, for example.

Ah, lazy me didn't read the docs. Low power fifo mode is indeed hard
to report in a bug ;-)

> The patch is correct, though had I used enabled |= 1 << PIPE_[ABC] it
> would have probably prevented this bug.

This would be quite a bit less magic I think. Can I have it, please?
-Daniel

> Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>




-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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