Re: [ 54/86] drm/i915: Set i9xx sdvo clock limits according to specifications

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On Wed, Feb 27, 2013 at 1:08 AM, Greg Kroah-Hartman
<gregkh@xxxxxxxxxxxxxxxxxxx> wrote:
> 3.4-stable review patch.  If anyone has any objections, please let me know.
>
> ------------------
>
> From: Patrik Jakobsson <patrik.r.jakobsson@xxxxxxxxx>
>
> commit 4f7dfb6788dd022446847fbbfbe45e13bedb5be2 upstream.
>
> The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and 5-9.
> Since we do all calculations based on them being register values (which are
> subtracted by 2) we need to specify them accordingly.
>
> Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson@xxxxxxxxx>
> Reviewed-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56359
> Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxx>
> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -142,8 +142,8 @@ static const intel_limit_t intel_limits_
>         .vco = { .min = 1400000, .max = 2800000 },
>         .n = { .min = 1, .max = 6 },
>         .m = { .min = 70, .max = 120 },
> -       .m1 = { .min = 10, .max = 22 },
> -       .m2 = { .min = 5, .max = 9 },
> +       .m1 = { .min = 8, .max = 18 },
> +       .m2 = { .min = 3, .max = 7 },
>         .p = { .min = 5, .max = 80 },
>         .p1 = { .min = 1, .max = 8 },
>         .p2 = { .dot_limit = 200000,

Is this really stable material? It fixes no known issues and the bug
report seems to be a different problem.

-Patrik
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