This is a note to let you know that I've just added the patch titled
arm64: dts: rockchip: add rs485 support on uart5 of px30-ringneck-haikou
to the 6.6-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-dts-rockchip-add-rs485-support-on-uart5-of-px3.patch
and it can be found in the queue-6.6 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit ad9bc1a6cdab7c55b58544351a4ff79ea25b134e
Author: Farouk Bouabid <farouk.bouabid@xxxxxxxxxxxxxxxxxxxxx>
Date: Thu Feb 8 16:39:56 2024 +0100
arm64: dts: rockchip: add rs485 support on uart5 of px30-ringneck-haikou
[ Upstream commit 5963d97aa780619ffb66cf4886c0ca1175ccbd3e ]
A hardware switch can set the rs485 transceiver into half or full duplex
mode.
Switching to the half-duplex mode requires the user to enable em485 on
uart5 using ioctl, DE/RE are both connected to GPIO0_B5 which is the
RTS signal for uart0. Implement GPIO0_B5 as rts-gpios with RTS_ON_SEND
option enabled (default) so that driver mode gets enabled while sending
(RTS high) and receiver mode gets enabled while not sending (RTS low).
In full-duplex mode (em485 is disabled), DE is connected to GPIO0_B5 and
RE is grounded (enabled). Since GPIO0_B5 is implemented as rts-gpios, the
driver mode gets enabled whenever we want to send something and RE is not
affected (always enabled) in this case by the state of RTS.
Signed-off-by: Farouk Bouabid <farouk.bouabid@xxxxxxxxxxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20240208-dev-rx-enable-v6-2-39e68e17a339@xxxxxxxxxxxxxxxxxxxxx
Signed-off-by: Heiko Stuebner <heiko@xxxxxxxxx>
Stable-dep-of: 5ae4dca718ea ("arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck")
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
index de0a1f2af983b..56f73c17363fd 100644
--- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
@@ -226,6 +226,7 @@ &uart0 {
&uart5 {
pinctrl-0 = <&uart5_xfer>;
+ rts-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
