Patch "arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array" has been added to the 6.6-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-cacheinfo-avoid-out-of-bounds-write-to-cachein.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 9313ef65f2a4635b9f7432950f4bd192f683cd69
Author: Radu Rendec <rrendec@xxxxxxxxxx>
Date:   Thu Feb 6 12:44:20 2025 -0500

    arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array
    
    [ Upstream commit 875d742cf5327c93cba1f11e12b08d3cce7a88d2 ]
    
    The loop that detects/populates cache information already has a bounds
    check on the array size but does not account for cache levels with
    separate data/instructions cache. Fix this by incrementing the index
    for any populated leaf (instead of any populated level).
    
    Fixes: 5d425c186537 ("arm64: kernel: add support for cpu cache information")
    
    Signed-off-by: Radu Rendec <rrendec@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20250206174420.2178724-1-rrendec@xxxxxxxxxx
    Signed-off-by: Will Deacon <will@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/kernel/cacheinfo.c b/arch/arm64/kernel/cacheinfo.c
index d9c9218fa1fdd..309942b06c5bc 100644
--- a/arch/arm64/kernel/cacheinfo.c
+++ b/arch/arm64/kernel/cacheinfo.c
@@ -101,16 +101,18 @@ int populate_cache_leaves(unsigned int cpu)
 	unsigned int level, idx;
 	enum cache_type type;
 	struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
-	struct cacheinfo *this_leaf = this_cpu_ci->info_list;
+	struct cacheinfo *infos = this_cpu_ci->info_list;
 
 	for (idx = 0, level = 1; level <= this_cpu_ci->num_levels &&
-	     idx < this_cpu_ci->num_leaves; idx++, level++) {
+	     idx < this_cpu_ci->num_leaves; level++) {
 		type = get_cache_type(level);
 		if (type == CACHE_TYPE_SEPARATE) {
-			ci_leaf_init(this_leaf++, CACHE_TYPE_DATA, level);
-			ci_leaf_init(this_leaf++, CACHE_TYPE_INST, level);
+			if (idx + 1 >= this_cpu_ci->num_leaves)
+				break;
+			ci_leaf_init(&infos[idx++], CACHE_TYPE_DATA, level);
+			ci_leaf_init(&infos[idx++], CACHE_TYPE_INST, level);
 		} else {
-			ci_leaf_init(this_leaf++, type, level);
+			ci_leaf_init(&infos[idx++], type, level);
 		}
 	}
 	return 0;