Patch "drm/rockchip: vop2: Setup delay cycle for Esmart2/3" has been added to the 6.13-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/rockchip: vop2: Setup delay cycle for Esmart2/3

to the 6.13-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-rockchip-vop2-setup-delay-cycle-for-esmart2-3.patch
and it can be found in the queue-6.13 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 8269932936a041ad0b496bac7e0f5c86edda29c4
Author: Andy Yan <andy.yan@xxxxxxxxxxxxxx>
Date:   Sat Dec 14 16:17:03 2024 +0800

    drm/rockchip: vop2: Setup delay cycle for Esmart2/3
    
    [ Upstream commit c766998ba6df126ab6934d32ff2ff080316ec630 ]
    
    Each layer needs to set the correct delay cycle to display properly
    without unexpected offset on screen.
    
    Fixes: 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
    Signed-off-by: Andy Yan <andy.yan@xxxxxxxxxxxxxx>
    Tested-by: Derek Foreman <derek.foreman@xxxxxxxxxxxxx>
    Tested-by: Detlev Casanova <detlev.casanova@xxxxxxxxxxxxx>
    Signed-off-by: Heiko Stuebner <heiko@xxxxxxxxx>
    Link: https://patchwork.freedesktop.org/patch/msgid/20241214081719.3330518-5-andyshrk@xxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index cd3fb906d0089..68b5c438cdaba 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -2493,9 +2493,11 @@ static void vop2_setup_dly_for_windows(struct vop2 *vop2)
 			sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__ESMART1, dly);
 			break;
 		case ROCKCHIP_VOP2_SMART0:
+		case ROCKCHIP_VOP2_ESMART2:
 			sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__SMART0, dly);
 			break;
 		case ROCKCHIP_VOP2_SMART1:
+		case ROCKCHIP_VOP2_ESMART3:
 			sdly |= FIELD_PREP(RK3568_SMART_DLY_NUM__SMART1, dly);
 			break;
 		}




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