Patch "PCI: vmd: Set devices to D0 before enabling PM L1 Substates" has been added to the 6.6-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    PCI: vmd: Set devices to D0 before enabling PM L1 Substates

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     pci-vmd-set-devices-to-d0-before-enabling-pm-l1-subs.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 7cdb3a943a3b706efd52ed7a2c95d6f81675bbb9
Author: Jian-Hong Pan <jhp@xxxxxxxxxxxxx>
Date:   Tue Oct 1 16:34:38 2024 +0800

    PCI: vmd: Set devices to D0 before enabling PM L1 Substates
    
    [ Upstream commit d66041063192497a4a97d21dbf86b79a03a7f4fb ]
    
    The remapped PCIe Root Port and the child device have PM L1 Substates
    capability, but they are disabled originally.
    
    Here is a failed example on ASUS B1400CEAE:
    
      Capabilities: [900 v1] L1 PM Substates
            L1SubCap: PCI-PM_L1.2+ PCI-PM_L1.1- ASPM_L1.2+ ASPM_L1.1- L1_PM_Substates+
                      PortCommonModeRestoreTime=32us PortTPowerOnTime=10us
            L1SubCtl1: PCI-PM_L1.2- PCI-PM_L1.1- ASPM_L1.2+ ASPM_L1.1-
                       T_CommonMode=0us LTR1.2_Threshold=101376ns
            L1SubCtl2: T_PwrOn=50us
    
    Enable PCI-PM L1 PM Substates for devices below VMD while they are in D0
    (see PCIe r6.0, sec 5.5.4).
    
    Link: https://lore.kernel.org/r/20241001083438.10070-4-jhp@xxxxxxxxxxxxx
    Link: https://bugzilla.kernel.org/show_bug.cgi?id=218394
    Signed-off-by: Jian-Hong Pan <jhp@xxxxxxxxxxxxx>
    Signed-off-by: Krzysztof Wilczyński <kwilczynski@xxxxxxxxxx>
    Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
    Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@xxxxxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c
index ade18991e7366..992fea22fd9f8 100644
--- a/drivers/pci/controller/vmd.c
+++ b/drivers/pci/controller/vmd.c
@@ -751,11 +751,9 @@ static int vmd_pm_enable_quirk(struct pci_dev *pdev, void *userdata)
 	if (!(features & VMD_FEAT_BIOS_PM_QUIRK))
 		return 0;
 
-	pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL);
-
 	pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_LTR);
 	if (!pos)
-		return 0;
+		goto out_state_change;
 
 	/*
 	 * Skip if the max snoop LTR is non-zero, indicating BIOS has set it
@@ -763,7 +761,7 @@ static int vmd_pm_enable_quirk(struct pci_dev *pdev, void *userdata)
 	 */
 	pci_read_config_dword(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, &ltr_reg);
 	if (!!(ltr_reg & (PCI_LTR_VALUE_MASK | PCI_LTR_SCALE_MASK)))
-		return 0;
+		goto out_state_change;
 
 	/*
 	 * Set the default values to the maximum required by the platform to
@@ -775,6 +773,13 @@ static int vmd_pm_enable_quirk(struct pci_dev *pdev, void *userdata)
 	pci_write_config_dword(pdev, pos + PCI_LTR_MAX_SNOOP_LAT, ltr_reg);
 	pci_info(pdev, "VMD: Default LTR value set by driver\n");
 
+out_state_change:
+	/*
+	 * Ensure devices are in D0 before enabling PCI-PM L1 PM Substates, per
+	 * PCIe r6.0, sec 5.5.4.
+	 */
+	pci_set_power_state_locked(pdev, PCI_D0);
+	pci_enable_link_state_locked(pdev, PCIE_LINK_STATE_ALL);
 	return 0;
 }