Patch "ixgbe: Correct BASE-BX10 compliance code" has been added to the 6.12-stable tree

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This is a note to let you know that I've just added the patch titled

    ixgbe: Correct BASE-BX10 compliance code

to the 6.12-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     ixgbe-correct-base-bx10-compliance-code.patch
and it can be found in the queue-6.12 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 6fc4fd37840aaba8987dcfce4d1e04fd5fad806c
Author: Tore Amundsen <tore@xxxxxxxxxxxx>
Date:   Fri Nov 15 14:17:36 2024 +0000

    ixgbe: Correct BASE-BX10 compliance code
    
    [ Upstream commit f72ce14b231f7bf06088e4e50f1875f1e35f79d7 ]
    
    SFF-8472 (section 5.4 Transceiver Compliance Codes) defines bit 6 as
    BASE-BX10. Bit 6 means a value of 0x40 (decimal 64).
    
    The current value in the source code is 0x64, which appears to be a
    mix-up of hex and decimal values. A value of 0x64 (binary 01100100)
    incorrectly sets bit 2 (1000BASE-CX) and bit 5 (100BASE-FX) as well.
    
    Fixes: 1b43e0d20f2d ("ixgbe: Add 1000BASE-BX support")
    Signed-off-by: Tore Amundsen <tore@xxxxxxxxxxxx>
    Reviewed-by: Paul Menzel <pmenzel@xxxxxxxxxxxxx>
    Acked-by: Ernesto Castellotti <ernesto@xxxxxxxxxxxxxxx>
    Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@xxxxxxxxx> (A Contingent worker at Intel)
    Signed-off-by: Tony Nguyen <anthony.l.nguyen@xxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
index 14aa2ca51f70e..81179c60af4e0 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h
@@ -40,7 +40,7 @@
 #define IXGBE_SFF_1GBASESX_CAPABLE		0x1
 #define IXGBE_SFF_1GBASELX_CAPABLE		0x2
 #define IXGBE_SFF_1GBASET_CAPABLE		0x8
-#define IXGBE_SFF_BASEBX10_CAPABLE		0x64
+#define IXGBE_SFF_BASEBX10_CAPABLE		0x40
 #define IXGBE_SFF_10GBASESR_CAPABLE		0x10
 #define IXGBE_SFF_10GBASELR_CAPABLE		0x20
 #define IXGBE_SFF_SOFT_RS_SELECT_MASK		0x8




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