Patch "clk: clk-axi-clkgen: make sure to enable the AXI bus clock" has been added to the 4.19-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    clk: clk-axi-clkgen: make sure to enable the AXI bus clock

to the 4.19-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-clk-axi-clkgen-make-sure-to-enable-the-axi-bus-c.patch
and it can be found in the queue-4.19 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit eddfb873cd6e33d4e8b02aea98089cd1feecf2d5
Author: Nuno Sa <nuno.sa@xxxxxxxxxx>
Date:   Tue Oct 29 14:59:42 2024 +0100

    clk: clk-axi-clkgen: make sure to enable the AXI bus clock
    
    [ Upstream commit c64ef7e4851d1a9abbb7f7833e4936973ac5ba79 ]
    
    In order to access the registers of the HW, we need to make sure that
    the AXI bus clock is enabled. Hence let's increase the number of clocks
    by one.
    
    In order to keep backward compatibility and make sure old DTs still work
    we check if clock-names is available or not. If it is, then we can
    disambiguate between really having the AXI clock or a parent clock and
    so we can enable the bus clock. If not, we fallback to what was done
    before and don't explicitly enable the AXI bus clock.
    
    Note that if clock-names is given, the axi clock must be the last one in
    the phandle array (also enforced in the DT bindings) so that we can reuse
    as much code as possible.
    
    Fixes: 0e646c52cf0e ("clk: Add axi-clkgen driver")
    Signed-off-by: Nuno Sa <nuno.sa@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20241029-axi-clkgen-fix-axiclk-v2-2-bc5e0733ad76@xxxxxxxxxx
    Signed-off-by: Stephen Boyd <sboyd@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c
index 7289da51b74f1..f1e276ce28d46 100644
--- a/drivers/clk/clk-axi-clkgen.c
+++ b/drivers/clk/clk-axi-clkgen.c
@@ -9,6 +9,7 @@
  */
 
 #include <linux/platform_device.h>
+#include <linux/clk.h>
 #include <linux/clk-provider.h>
 #include <linux/slab.h>
 #include <linux/io.h>
@@ -414,6 +415,7 @@ static int axi_clkgen_probe(struct platform_device *pdev)
 	struct clk_init_data init;
 	const char *parent_names[2];
 	const char *clk_name;
+	struct clk *axi_clk;
 	unsigned int i;
 	int ret;
 
@@ -433,8 +435,24 @@ static int axi_clkgen_probe(struct platform_device *pdev)
 		return PTR_ERR(axi_clkgen->base);
 
 	init.num_parents = of_clk_get_parent_count(pdev->dev.of_node);
-	if (init.num_parents < 1 || init.num_parents > 2)
-		return -EINVAL;
+
+	axi_clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk");
+	if (!IS_ERR(axi_clk)) {
+		if (init.num_parents < 2 || init.num_parents > 3)
+			return -EINVAL;
+
+		init.num_parents -= 1;
+	} else {
+		/*
+		 * Legacy... So that old DTs which do not have clock-names still
+		 * work. In this case we don't explicitly enable the AXI bus
+		 * clock.
+		 */
+		if (PTR_ERR(axi_clk) != -ENOENT)
+			return PTR_ERR(axi_clk);
+		if (init.num_parents < 1 || init.num_parents > 2)
+			return -EINVAL;
+	}
 
 	for (i = 0; i < init.num_parents; i++) {
 		parent_names[i] = of_clk_get_parent_name(pdev->dev.of_node, i);