Patch "counter: stm32-timer-cnt: Add check for clk_enable()" has been added to the 6.1-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    counter: stm32-timer-cnt: Add check for clk_enable()

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     counter-stm32-timer-cnt-add-check-for-clk_enable.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit de287184094cec577a56b28781b42047c507a3c4
Author: Jiasheng Jiang <jiashengjiangcool@xxxxxxxxx>
Date:   Mon Nov 4 19:18:25 2024 +0000

    counter: stm32-timer-cnt: Add check for clk_enable()
    
    [ Upstream commit 842c3755a6bfbfcafa4a1438078d2485a9eb1d87 ]
    
    Add check for the return value of clk_enable() in order to catch the
    potential exception.
    
    Fixes: c5b8425514da ("counter: stm32-timer-cnt: add power management support")
    Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder")
    Signed-off-by: Jiasheng Jiang <jiashengjiangcool@xxxxxxxxx>
    Link: https://lore.kernel.org/r/20241104191825.40155-1-jiashengjiangcool@xxxxxxxxx
    Signed-off-by: William Breathitt Gray <wbg@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c
index 9bf20a5d6bda8..e752fc8cb190a 100644
--- a/drivers/counter/stm32-timer-cnt.c
+++ b/drivers/counter/stm32-timer-cnt.c
@@ -195,11 +195,17 @@ static int stm32_count_enable_write(struct counter_device *counter,
 {
 	struct stm32_timer_cnt *const priv = counter_priv(counter);
 	u32 cr1;
+	int ret;
 
 	if (enable) {
 		regmap_read(priv->regmap, TIM_CR1, &cr1);
-		if (!(cr1 & TIM_CR1_CEN))
-			clk_enable(priv->clk);
+		if (!(cr1 & TIM_CR1_CEN)) {
+			ret = clk_enable(priv->clk);
+			if (ret) {
+				dev_err(counter->parent, "Cannot enable clock %d\n", ret);
+				return ret;
+			}
+		}
 
 		regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
 				   TIM_CR1_CEN);
@@ -380,7 +386,11 @@ static int __maybe_unused stm32_timer_cnt_resume(struct device *dev)
 		return ret;
 
 	if (priv->enabled) {
-		clk_enable(priv->clk);
+		ret = clk_enable(priv->clk);
+		if (ret) {
+			dev_err(dev, "Cannot enable clock %d\n", ret);
+			return ret;
+		}
 
 		/* Restore registers that may have been lost */
 		regmap_write(priv->regmap, TIM_SMCR, priv->bak.smcr);