Patch "tg3: Set coherent DMA mask bits to 31 for BCM57766 chipsets" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    tg3: Set coherent DMA mask bits to 31 for BCM57766 chipsets

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     tg3-set-coherent-dma-mask-bits-to-31-for-bcm57766-ch.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 599a1033243e6b15539e7234a90c326961f35d25
Author: Pavan Chebbi <pavan.chebbi@xxxxxxxxxxxx>
Date:   Mon Nov 18 21:57:41 2024 -0800

    tg3: Set coherent DMA mask bits to 31 for BCM57766 chipsets
    
    [ Upstream commit 614f4d166eeeb9bd709b0ad29552f691c0f45776 ]
    
    The hardware on Broadcom 1G chipsets have a known limitation
    where they cannot handle DMA addresses that cross over 4GB.
    When such an address is encountered, the hardware sets the
    address overflow error bit in the DMA status register and
    triggers a reset.
    
    However, BCM57766 hardware is setting the overflow bit and
    triggering a reset in some cases when there is no actual
    underlying address overflow. The hardware team analyzed the
    issue and concluded that it is happening when the status
    block update has an address with higher (b16 to b31) bits
    as 0xffff following a previous update that had lowest bits
    as 0xffff.
    
    To work around this bug in the BCM57766 hardware, set the
    coherent dma mask from the current 64b to 31b. This will
    ensure that upper bits of the status block DMA address are
    always at most 0x7fff, thus avoiding the improper overflow
    check described above. This work around is intended for only
    status block and ring memories and has no effect on TX and
    RX buffers as they do not require coherent memory.
    
    Fixes: 72f2afb8a685 ("[TG3]: Add DMA address workaround")
    Reported-by: Salam Noureddine <noureddine@xxxxxxxxxx>
    Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@xxxxxxxxxxxx>
    Reviewed-by: Somnath Kotur <somnath.kotur@xxxxxxxxxxxx>
    Signed-off-by: Pavan Chebbi <pavan.chebbi@xxxxxxxxxxxx>
    Reviewed-by: Michal Kubiak <michal.kubiak@xxxxxxxxx>
    Link: https://patch.msgid.link/20241119055741.147144-1-pavan.chebbi@xxxxxxxxxxxx
    Signed-off-by: Jakub Kicinski <kuba@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 0c694ab3c110c..dab0ab10d111a 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -17736,6 +17736,9 @@ static int tg3_init_one(struct pci_dev *pdev,
 	} else
 		persist_dma_mask = dma_mask = DMA_BIT_MASK(64);
 
+	if (tg3_asic_rev(tp) == ASIC_REV_57766)
+		persist_dma_mask = DMA_BIT_MASK(31);
+
 	/* Configure DMA attributes. */
 	if (dma_mask > DMA_BIT_MASK(32)) {
 		err = dma_set_mask(&pdev->dev, dma_mask);




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