Patch "clk: imx: fracn-gppll: correct PLL initialization flow" has been added to the 6.6-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    clk: imx: fracn-gppll: correct PLL initialization flow

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-imx-fracn-gppll-correct-pll-initialization-flow.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 33b38d05bc4e528db94dc8f92f26c10b6c1e9621
Author: Peng Fan <peng.fan@xxxxxxx>
Date:   Sun Oct 27 20:00:08 2024 +0800

    clk: imx: fracn-gppll: correct PLL initialization flow
    
    [ Upstream commit 557be501c38e1864b948fc6ccdf4b035d610a2ea ]
    
    Per i.MX93 Reference Mannual 22.4 Initialization information
    1. Program appropriate value of DIV[ODIV], DIV[RDIV] and DIV[MFI]
       as per Integer mode.
    2. Wait for 5 μs.
    3. Program the following field in CTRL register.
       Set CTRL[POWERUP] to 1'b1 to enable PLL block.
    4. Poll PLL_STATUS[PLL_LOCK] register, and wait till PLL_STATUS[PLL_LOCK]
       is 1'b1 and pll_lock output signal is 1'b1.
    5. Set CTRL[CLKMUX_EN] to 1'b1 to enable PLL output clock.
    
    So move the CLKMUX_EN operation after PLL locked.
    
    Fixes: 1b26cb8a77a4 ("clk: imx: support fracn gppll")
    Co-developed-by: Jacky Bai <ping.bai@xxxxxxx>
    Signed-off-by: Jacky Bai <ping.bai@xxxxxxx>
    Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
    Reviewed-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20241027-imx-clk-v1-v3-2-89152574d1d7@xxxxxxx
    Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/imx/clk-fracn-gppll.c b/drivers/clk/imx/clk-fracn-gppll.c
index 1becba2b62d0b..f85dd8798f15c 100644
--- a/drivers/clk/imx/clk-fracn-gppll.c
+++ b/drivers/clk/imx/clk-fracn-gppll.c
@@ -301,13 +301,13 @@ static int clk_fracn_gppll_prepare(struct clk_hw *hw)
 	val |= POWERUP_MASK;
 	writel_relaxed(val, pll->base + PLL_CTRL);
 
-	val |= CLKMUX_EN;
-	writel_relaxed(val, pll->base + PLL_CTRL);
-
 	ret = clk_fracn_gppll_wait_lock(pll);
 	if (ret)
 		return ret;
 
+	val |= CLKMUX_EN;
+	writel_relaxed(val, pll->base + PLL_CTRL);
+
 	val &= ~CLKMUX_BYPASS;
 	writel_relaxed(val, pll->base + PLL_CTRL);