Patch "arm64: dts: qcom: sm6350: Fix GPU frequencies missing on some speedbins" has been added to the 6.11-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    arm64: dts: qcom: sm6350: Fix GPU frequencies missing on some speedbins

to the 6.11-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-qcom-sm6350-fix-gpu-frequencies-missing-on.patch
and it can be found in the queue-6.11 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit d3f4bc9ac0608143f8a0187516920bddd689b77f
Author: Luca Weiss <luca.weiss@xxxxxxxxxxxxx>
Date:   Wed Oct 2 14:58:06 2024 +0200

    arm64: dts: qcom: sm6350: Fix GPU frequencies missing on some speedbins
    
    [ Upstream commit 600c499f8f5297c2c91e8146a8217f299e445ef6 ]
    
    Make sure the GPU frequencies are marked as supported for the respective
    speedbins according to downstream msm-4.19 kernel:
    
    * 850 MHz: Speedbins 0 + 180
    * 800 MHz: Speedbins 0 + 180 + 169
    * 650 MHz: Speedbins 0 + 180 + 169 + 138
    * 565 MHz: Speedbins 0 + 180 + 169 + 138 + 120
    * 430 MHz: Speedbins 0 + 180 + 169 + 138 + 120
    * 355 MHz: Speedbins 0 + 180 + 169 + 138 + 120
    * 253 MHz: Speedbins 0 + 180 + 169 + 138 + 120
    
    Fixes: bd9b76750280 ("arm64: dts: qcom: sm6350: Add GPU nodes")
    Signed-off-by: Luca Weiss <luca.weiss@xxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20241002-sm6350-gpu-speedbin-fix-v1-1-8a5d90c5097d@xxxxxxxxxxxxx
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 7986ddb30f6e8..4f8477de7e1b1 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1376,43 +1376,43 @@ gpu_opp_table: opp-table {
 				opp-850000000 {
 					opp-hz = /bits/ 64 <850000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
-					opp-supported-hw = <0x02>;
+					opp-supported-hw = <0x03>;
 				};
 
 				opp-800000000 {
 					opp-hz = /bits/ 64 <800000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
-					opp-supported-hw = <0x04>;
+					opp-supported-hw = <0x07>;
 				};
 
 				opp-650000000 {
 					opp-hz = /bits/ 64 <650000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
-					opp-supported-hw = <0x08>;
+					opp-supported-hw = <0x0f>;
 				};
 
 				opp-565000000 {
 					opp-hz = /bits/ 64 <565000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
-					opp-supported-hw = <0x10>;
+					opp-supported-hw = <0x1f>;
 				};
 
 				opp-430000000 {
 					opp-hz = /bits/ 64 <430000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
-					opp-supported-hw = <0xff>;
+					opp-supported-hw = <0x1f>;
 				};
 
 				opp-355000000 {
 					opp-hz = /bits/ 64 <355000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
-					opp-supported-hw = <0xff>;
+					opp-supported-hw = <0x1f>;
 				};
 
 				opp-253000000 {
 					opp-hz = /bits/ 64 <253000000>;
 					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
-					opp-supported-hw = <0xff>;
+					opp-supported-hw = <0x1f>;
 				};
 			};
 		};