Patch "irqchip/ocelot: Fix trigger register address" has been added to the 6.6-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    irqchip/ocelot: Fix trigger register address

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     irqchip-ocelot-fix-trigger-register-address.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 07887da6ebaf808b836406971a89ac9a4b3a50c9
Author: Sergey Matsievskiy <matsievskiysv@xxxxxxxxx>
Date:   Wed Sep 25 21:44:15 2024 +0300

    irqchip/ocelot: Fix trigger register address
    
    [ Upstream commit 9e9c4666abb5bb444dac37e2d7eb5250c8d52a45 ]
    
    Controllers, supported by this driver, have two sets of registers:
    
     * (main) interrupt registers control peripheral interrupt sources.
    
     * device interrupt registers configure per-device (network interface)
       interrupts and act as an extra stage before the main interrupt
       registers.
    
    In the driver unmask code, device trigger registers are used in the mask
    calculation of the main interrupt sticky register, mixing two kinds of
    registers.
    
    Use the main interrupt trigger register instead.
    
    Signed-off-by: Sergey Matsievskiy <matsievskiysv@xxxxxxxxx>
    Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
    Link: https://lore.kernel.org/all/20240925184416.54204-2-matsievskiysv@xxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/irqchip/irq-mscc-ocelot.c b/drivers/irqchip/irq-mscc-ocelot.c
index 4d0c3532dbe73..c19ab379e8c5e 100644
--- a/drivers/irqchip/irq-mscc-ocelot.c
+++ b/drivers/irqchip/irq-mscc-ocelot.c
@@ -37,7 +37,7 @@ static struct chip_props ocelot_props = {
 	.reg_off_ena_clr	= 0x1c,
 	.reg_off_ena_set	= 0x20,
 	.reg_off_ident		= 0x38,
-	.reg_off_trigger	= 0x5c,
+	.reg_off_trigger	= 0x4,
 	.n_irq			= 24,
 };
 
@@ -70,7 +70,7 @@ static struct chip_props jaguar2_props = {
 	.reg_off_ena_clr	= 0x1c,
 	.reg_off_ena_set	= 0x20,
 	.reg_off_ident		= 0x38,
-	.reg_off_trigger	= 0x5c,
+	.reg_off_trigger	= 0x4,
 	.n_irq			= 29,
 };