From: Suraj Kandpal <suraj.kandpal@xxxxxxxxx> commit c7085d08c7e53d9aef0cdd4b20798356f6f5d469 upstream. Disable bit 29 of SCLKGATE_DIS register around pps sequence when we turn panel power on. --v2 -Squash two commit together [Jani] -Use IS_DISPLAY_VER [Jani] -Fix multiline comment [Jani] --v3 -Define register in a more appropriate place [Mitul] --v4 -Register is already defined no need to define it again [Ville] -Use correct WA number (lineage no.) [Dnyaneshwar] -Fix the range on which this WA is applied [Dnyaneshwar] Bspec: 49304 Signed-off-by: Suraj Kandpal <suraj.kandpal@xxxxxxxxx> Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@xxxxxxxxx> Link: https://patchwork.freedesktop.org/patch/msgid/20240813042807.4015214-1-suraj.kandpal@xxxxxxxxx Signed-off-by: Lucas De Marchi <lucas.demarchi@xxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/display/intel_pps.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -951,6 +951,14 @@ void intel_pps_on_unlocked(struct intel_ intel_de_posting_read(dev_priv, pp_ctrl_reg); } + /* + * WA: 22019252566 + * Disable DPLS gating around power sequence. + */ + if (IS_DISPLAY_VER(dev_priv, 13, 14)) + intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, + 0, PCH_DPLSUNIT_CLOCK_GATE_DISABLE); + pp |= PANEL_POWER_ON; if (!IS_IRONLAKE(dev_priv)) pp |= PANEL_POWER_RESET; @@ -961,6 +969,10 @@ void intel_pps_on_unlocked(struct intel_ wait_panel_on(intel_dp); intel_dp->pps.last_power_on = jiffies; + if (IS_DISPLAY_VER(dev_priv, 13, 14)) + intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, + PCH_DPLSUNIT_CLOCK_GATE_DISABLE, 0); + if (IS_IRONLAKE(dev_priv)) { pp |= PANEL_POWER_RESET; /* restore panel reset bit */ intel_de_write(dev_priv, pp_ctrl_reg, pp); Patches currently in stable-queue which might be from lucas.demarchi@xxxxxxxxx are queue-6.11/drm-xe-add-mmio-read-before-ggtt-invalidate.patch queue-6.11/drm-i915-disable-fbc-due-to-wa_16023588340.patch queue-6.11/drm-i915-skip-programming-fia-link-enable-bits-for-mtl.patch queue-6.11/drm-i915-display-cache-adpative-sync-caps-to-use-it-later.patch queue-6.11/drm-i915-display-don-t-enable-decompression-on-xe2-with-tile4.patch queue-6.11/drm-xe-xe2-introduce-performance-changes.patch queue-6.11/drm-xe-define-stateless_compression_ctrl-as-mcr-register.patch queue-6.11/drm-i915-hdcp-add-encoder-check-in-hdcp2_get_capability.patch queue-6.11/drm-i915-hdcp-add-encoder-check-in-intel_hdcp_get_capability.patch queue-6.11/drm-xe-don-t-short-circuit-tdr-on-jobs-not-started.patch queue-6.11/drm-xe-write-all-slices-if-its-mcr-register.patch queue-6.11/drm-i915-move-rawclk-from-runtime-to-display-runtime-info.patch queue-6.11/drm-xe-display-drop-unused-rawclk_freq-and-runtime_info.patch queue-6.11/drm-xe-xe2hpg-add-wa_15016589081.patch queue-6.11/drm-i915-display-dp-compute-as-sdp-when-vrr-is-also-enabled.patch queue-6.11/drm-i915-pps-disable-dpls_gating-around-pps-sequence.patch queue-6.11/drm-i915-dp-clear-vsc-sdp-during-post-ddi-disable-routine.patch queue-6.11/drm-xe-xe2-add-performance-turning-changes.patch queue-6.11/drm-i915-psr-prevent-panel-replay-if-crc-calculation-is-enabled.patch queue-6.11/drm-xe-move-enable-host-l2-vram-post-mcr-init.patch queue-6.11/drm-xe-support-nomodeset-kernel-command-line-option.patch queue-6.11/drm-xe-xe2hpg-introduce-performance-tuning-changes-for-xe2_hpg.patch queue-6.11/drm-i915-display-wa-for-re-initialize-dispcnlunitt1-xosc-clock.patch
