Patch "ASoC: fsl_sai: Enable 'FIFO continue on error' FCONT bit" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    ASoC: fsl_sai: Enable 'FIFO continue on error' FCONT bit

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     asoc-fsl_sai-enable-fifo-continue-on-error-fcont-bit.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 92b4b6a4aff9de7fb1fa0644b1f3d36e6c664e51
Author: Shengjiu Wang <shengjiu.wang@xxxxxxx>
Date:   Mon Sep 30 14:08:28 2024 +0800

    ASoC: fsl_sai: Enable 'FIFO continue on error' FCONT bit
    
    [ Upstream commit 72455e33173c1a00c0ce93d2b0198eb45d5f4195 ]
    
    FCONT=1 means On FIFO error, the SAI will continue from the
    same word that caused the FIFO error to set after the FIFO
    warning flag has been cleared.
    
    Set FCONT bit in control register to avoid the channel swap
    issue after SAI xrun.
    
    Signed-off-by: Shengjiu Wang <shengjiu.wang@xxxxxxx>
    Link: https://patch.msgid.link/1727676508-22830-1-git-send-email-shengjiu.wang@xxxxxxx
    Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 3d202398c5411..aa15f56ca139d 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -604,6 +604,9 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
 
 	val_cr4 |= FSL_SAI_CR4_FRSZ(slots);
 
+	/* Set to avoid channel swap */
+	val_cr4 |= FSL_SAI_CR4_FCONT;
+
 	/* Set to output mode to avoid tri-stated data pins */
 	if (tx)
 		val_cr4 |= FSL_SAI_CR4_CHMOD;
@@ -690,7 +693,7 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
 
 	regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, ofs),
 			   FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK |
-			   FSL_SAI_CR4_CHMOD_MASK,
+			   FSL_SAI_CR4_CHMOD_MASK | FSL_SAI_CR4_FCONT_MASK,
 			   val_cr4);
 	regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx, ofs),
 			   FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 550df87b6a068..eba465c2387b6 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -137,6 +137,7 @@
 
 /* SAI Transmit and Receive Configuration 4 Register */
 
+#define FSL_SAI_CR4_FCONT_MASK	BIT(28)
 #define FSL_SAI_CR4_FCONT	BIT(28)
 #define FSL_SAI_CR4_FCOMB_SHIFT BIT(26)
 #define FSL_SAI_CR4_FCOMB_SOFT  BIT(27)




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