Patch "clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL" has been added to the 5.15-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-imx6ul-fix-clock-parent-for-imx6ul_clk_enetx_ref.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 7ca1a28556796205fcdcb1e2f340090358a0a963
Author: Michel Alex <Alex.Michel@xxxxxxxxxxxxxxxxxxx>
Date:   Mon Sep 2 09:05:53 2024 +0000

    clk: imx6ul: fix clock parent for IMX6UL_CLK_ENETx_REF_SEL
    
    [ Upstream commit 32c055ef563c3a4a73a477839f591b1b170bde8e ]
    
    Commit 4e197ee880c24ecb63f7fe17449b3653bc64b03c ("clk: imx6ul: add
    ethernet refclock mux support") sets the internal clock as default
    ethernet clock.
    
    Since IMX6UL_CLK_ENET_REF cannot be parent for IMX6UL_CLK_ENET1_REF_SEL,
    the call to clk_set_parent() fails. IMX6UL_CLK_ENET1_REF_125M is the correct
    parent and shall be used instead.
    Same applies for IMX6UL_CLK_ENET2_REF_SEL, for which IMX6UL_CLK_ENET2_REF_125M
    is the correct parent.
    
    Cc: stable@xxxxxxxxxxxxxxx
    Signed-off-by: Alex Michel <alex.michel@xxxxxxxxxxxxxxxxxxx>
    Reviewed-by: Oleksij Rempel <o.rempel@xxxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/AS1P250MB0608F9CE4009DCE65C61EEDEA9922@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
    Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/imx/clk-imx6ul.c b/drivers/clk/imx/clk-imx6ul.c
index bdf98ef60ba0f..7beda28ed2f09 100644
--- a/drivers/clk/imx/clk-imx6ul.c
+++ b/drivers/clk/imx/clk-imx6ul.c
@@ -535,8 +535,8 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
 
 	clk_set_parent(hws[IMX6UL_CLK_ENFC_SEL]->clk, hws[IMX6UL_CLK_PLL2_PFD2]->clk);
 
-	clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET_REF]->clk);
-	clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF]->clk);
+	clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET1_REF_125M]->clk);
+	clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF_125M]->clk);
 
 	imx_register_uart_clocks();
 }