Patch "drm/msm/a5xx: properly clear preemption records on resume" has been added to the 4.19-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/msm/a5xx: properly clear preemption records on resume

to the 4.19-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-msm-a5xx-properly-clear-preemption-records-on-re.patch
and it can be found in the queue-4.19 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 7d08913e65b404594663aad8f0c897a33156a7be
Author: Vladimir Lypak <vladimir.lypak@xxxxxxxxx>
Date:   Sun Sep 1 13:54:01 2024 +0000

    drm/msm/a5xx: properly clear preemption records on resume
    
    [ Upstream commit 64fd6d01a52904bdbda0ce810a45a428c995a4ca ]
    
    Two fields of preempt_record which are used by CP aren't reset on
    resume: "data" and "info". This is the reason behind faults which happen
    when we try to switch to the ring that was active last before suspend.
    In addition those faults can't be recovered from because we use suspend
    and resume to do so (keeping values of those fields again).
    
    Fixes: b1fc2839d2f9 ("drm/msm: Implement preemption for A5XX targets")
    Signed-off-by: Vladimir Lypak <vladimir.lypak@xxxxxxxxx>
    Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
    Patchwork: https://patchwork.freedesktop.org/patch/612043/
    Signed-off-by: Rob Clark <robdclark@xxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
index 970c7963ae29b..d6dc4168558e0 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
@@ -209,6 +209,8 @@ void a5xx_preempt_hw_init(struct msm_gpu *gpu)
 	int i;
 
 	for (i = 0; i < gpu->nr_rings; i++) {
+		a5xx_gpu->preempt[i]->data = 0;
+		a5xx_gpu->preempt[i]->info = 0;
 		a5xx_gpu->preempt[i]->wptr = 0;
 		a5xx_gpu->preempt[i]->rptr = 0;
 		a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova;




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