Patch "RISC-V: KVM: Fix to allow hpmcounter31 from the guest" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    RISC-V: KVM: Fix to allow hpmcounter31 from the guest

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     risc-v-kvm-fix-to-allow-hpmcounter31-from-the-guest.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit cae0ec422b3d355c4d3f77b291bf6ae8982e75df
Author: Atish Patra <atishp@xxxxxxxxxxxx>
Date:   Fri Aug 16 00:08:09 2024 -0700

    RISC-V: KVM: Fix to allow hpmcounter31 from the guest
    
    [ Upstream commit 5aa09297a3dcc798d038bd7436f8c90f664045a6 ]
    
    The csr_fun defines a count parameter which defines the total number
    CSRs emulated in KVM starting from the base. This value should be
    equal to total number of counters possible for trap/emulation (32).
    
    Fixes: a9ac6c37521f ("RISC-V: KVM: Implement trap & emulate for hpmcounters")
    Signed-off-by: Atish Patra <atishp@xxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240816-kvm_pmu_fixes-v1-2-cdfce386dd93@xxxxxxxxxxxx
    Signed-off-by: Anup Patel <anup@xxxxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/riscv/include/asm/kvm_vcpu_pmu.h b/arch/riscv/include/asm/kvm_vcpu_pmu.h
index 6823271bce322..a50a1d23523fe 100644
--- a/arch/riscv/include/asm/kvm_vcpu_pmu.h
+++ b/arch/riscv/include/asm/kvm_vcpu_pmu.h
@@ -58,11 +58,11 @@ struct kvm_pmu {
 
 #if defined(CONFIG_32BIT)
 #define KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS \
-{.base = CSR_CYCLEH,	.count = 31,	.func = kvm_riscv_vcpu_pmu_read_hpm }, \
-{.base = CSR_CYCLE,	.count = 31,	.func = kvm_riscv_vcpu_pmu_read_hpm },
+{.base = CSR_CYCLEH,	.count = 32,	.func = kvm_riscv_vcpu_pmu_read_hpm }, \
+{.base = CSR_CYCLE,	.count = 32,	.func = kvm_riscv_vcpu_pmu_read_hpm },
 #else
 #define KVM_RISCV_VCPU_HPMCOUNTER_CSR_FUNCS \
-{.base = CSR_CYCLE,	.count = 31,	.func = kvm_riscv_vcpu_pmu_read_hpm },
+{.base = CSR_CYCLE,	.count = 32,	.func = kvm_riscv_vcpu_pmu_read_hpm },
 #endif
 
 int kvm_riscv_vcpu_pmu_incr_fw(struct kvm_vcpu *vcpu, unsigned long fid);




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