Patch "crypto: qat - fix "Full Going True" macro definition" has been added to the 6.10-stable tree

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This is a note to let you know that I've just added the patch titled

    crypto: qat - fix "Full Going True" macro definition

to the 6.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     crypto-qat-fix-full-going-true-macro-definition.patch
and it can be found in the queue-6.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit ec0a2841bd510403069b22534e9ceae586e82715
Author: Svyatoslav Pankratov <svyatoslav.pankratov@xxxxxxxxx>
Date:   Thu Aug 15 16:47:23 2024 +0100

    crypto: qat - fix "Full Going True" macro definition
    
    [ Upstream commit 694a6f594817462942acbb1a35b1f7d61e2d49e7 ]
    
    The macro `ADF_RP_INT_SRC_SEL_F_RISE_MASK` is currently set to the value
    `0100b` which means "Empty Going False". This might cause an incorrect
    restore of the bank state during live migration.
    
    Fix the definition of the macro to properly represent the "Full Going
    True" state which is encoded as `0011b`.
    
    Fixes: bbfdde7d195f ("crypto: qat - add bank save and restore flows")
    Signed-off-by: Svyatoslav Pankratov <svyatoslav.pankratov@xxxxxxxxx>
    Reviewed-by: Xin Zeng <xin.zeng@xxxxxxxxx>
    Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@xxxxxxxxx>
    Signed-off-by: Herbert Xu <herbert@xxxxxxxxxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h
index 8b10926cedbac..e8c53bd76f1bd 100644
--- a/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h
+++ b/drivers/crypto/intel/qat/qat_common/adf_gen4_hw_data.h
@@ -83,7 +83,7 @@
 #define ADF_WQM_CSR_RPRESETSTS(bank)	(ADF_WQM_CSR_RPRESETCTL(bank) + 4)
 
 /* Ring interrupt */
-#define ADF_RP_INT_SRC_SEL_F_RISE_MASK	BIT(2)
+#define ADF_RP_INT_SRC_SEL_F_RISE_MASK	GENMASK(1, 0)
 #define ADF_RP_INT_SRC_SEL_F_FALL_MASK	GENMASK(2, 0)
 #define ADF_RP_INT_SRC_SEL_RANGE_WIDTH	4
 #define ADF_COALESCED_POLL_TIMEOUT_US	(1 * USEC_PER_SEC)




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