Patch "arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios" has been added to the 6.10-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios

to the 6.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-qcom-x1e80100-qcp-fix-missing-pcie4-gpios.patch
and it can be found in the queue-6.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 85c290af28b220b92c67e96260397b36e63eb219
Author: Johan Hovold <johan+linaro@xxxxxxxxxx>
Date:   Mon Jul 22 11:54:51 2024 +0200

    arm64: dts: qcom: x1e80100-qcp: fix missing PCIe4 gpios
    
    [ Upstream commit 2ac90e4d2b6d6823ca10642ef39595ff1181c3fa ]
    
    Add the missing PCIe4 perst, wake and clkreq GPIOs and pin config.
    
    Fixes: f9a9c11471da ("arm64: dts: qcom: x1e80100-qcp: Enable more support")
    Cc: stable@xxxxxxxxxxxxxxx      # 6.9
    Signed-off-by: Johan Hovold <johan+linaro@xxxxxxxxxx>
    Reviewed-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240722095459.27437-5-johan+linaro@xxxxxxxxxx
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
index 2cf3ea4f6e2e6..f90177a662b7d 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
@@ -469,6 +469,12 @@ &mdss_dp3_phy {
 };
 
 &pcie4 {
+	perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
+	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
+
+	pinctrl-0 = <&pcie4_default>;
+	pinctrl-names = "default";
+
 	status = "okay";
 };
 
@@ -558,6 +564,29 @@ nvme_reg_en: nvme-reg-en-state {
 		bias-disable;
 	};
 
+	pcie4_default: pcie4-default-state {
+		clkreq-n-pins {
+			pins = "gpio147";
+			function = "pcie4_clk";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+
+		perst-n-pins {
+			pins = "gpio146";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-disable;
+		};
+
+		wake-n-pins {
+			pins = "gpio148";
+			function = "gpio";
+			drive-strength = <2>;
+			bias-pull-up;
+		};
+	};
+
 	pcie6a_default: pcie6a-default-state {
 		clkreq-n-pins {
 			pins = "gpio153";