Patch "arm64: dts: imx93: update default value for snps,clk-csr" has been added to the 6.6-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    arm64: dts: imx93: update default value for snps,clk-csr

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-imx93-update-default-value-for-snps-clk-cs.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit d20ab41559dd2b412082dd4a3200a8dd21851586
Author: Shenwei Wang <shenwei.wang@xxxxxxx>
Date:   Mon Jul 15 08:17:22 2024 -0500

    arm64: dts: imx93: update default value for snps,clk-csr
    
    [ Upstream commit 109f256285dd6a5f8c3bd0d80d39b2ccd4fe314e ]
    
    For the i.MX93 SoC, the default clock rate for the IP of STMMAC EQOS is
    312.5 MHz. According to the following mapping table from the i.MX93
    reference manual, this clock rate corresponds to a CSR value of 6.
    
     0000: CSR clock = 60-100 MHz; MDC clock = CSR clock/42
     0001: CSR clock = 100-150 MHz; MDC clock = CSR clock/62
     0010: CSR clock = 20-35 MHz; MDC clock = CSR clock/16
     0011: CSR clock = 35-60 MHz; MDC clock = CSR clock/26
     0100: CSR clock = 150-250 MHz; MDC clock = CSR clock/102
     0101: CSR clock = 250-300 MHz; MDC clock = CSR clock/124
     0110: CSR clock = 300-500 MHz; MDC clock = CSR clock/204
     0111: CSR clock = 500-800 MHz; MDC clock = CSR clock/324
    
    Fixes: f2d03ba997cb ("arm64: dts: imx93: reorder device nodes")
    Signed-off-by: Shenwei Wang <shenwei.wang@xxxxxxx>
    Signed-off-by: Shawn Guo <shawnguo@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 8ca5c7b6fbf03..35155b009dd24 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -809,7 +809,7 @@ eqos: ethernet@428a0000 {
 							 <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
 				assigned-clock-rates = <100000000>, <250000000>;
 				intf_mode = <&wakeupmix_gpr 0x28>;
-				snps,clk-csr = <0>;
+				snps,clk-csr = <6>;
 				nvmem-cells = <&eth_mac2>;
 				nvmem-cell-names = "mac-address";
 				status = "disabled";