From: Hamza Mahfooz <hamza.mahfooz@xxxxxxx> commit f6098641d3e1e4d4052ff9378857c831f9675f6b upstream. To be able to get to the lowest power state when suspending systems with DCN3.5+, we must be in IPS before the display hardware is put into D3cold. So, to ensure that the system always reaches the lowest power state while suspending, force systems that support IPS to enter idle optimizations before entering D3cold. Reviewed-by: Roman Li <roman.li@xxxxxxx> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@xxxxxxx> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> (cherry picked from commit 237193e21b29d4aa0617ffeea3d6f49e72999708) Cc: stable@xxxxxxxxxxxxxxx # 6.10+ Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++ 1 file changed, 3 insertions(+) --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -2724,6 +2724,9 @@ static int dm_suspend(void *handle) hpd_rx_irq_work_suspend(dm); + if (adev->dm.dc->caps.ips_support) + dc_allow_idle_optimizations(adev->dm.dc, true); + dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3); dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3); Patches currently in stable-queue which might be from hamza.mahfooz@xxxxxxx are queue-6.10/drm-amd-display-fix-cursor-offset-on-rotation-180.patch queue-6.10/drm-amd-display-fix-s2idle-entry-for-dcn3.5.patch
