Patch "perf: imx_perf: fix counter start and config sequence" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    perf: imx_perf: fix counter start and config sequence

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     perf-imx_perf-fix-counter-start-and-config-sequence.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit a0bf93f28f3a01e537cf93d8ea70115c84ab3467
Author: Xu Yang <xu.yang_2@xxxxxxx>
Date:   Wed May 29 16:03:55 2024 +0800

    perf: imx_perf: fix counter start and config sequence
    
    [ Upstream commit ac9aa295f7a89d38656739628796f086f0b160e2 ]
    
    In current driver, the counter will start firstly and then be configured.
    This sequence is not correct for AXI filter events since the correct
    AXI_MASK and AXI_ID are not set yet. Then the results may be inaccurate.
    
    Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
    Fixes: 55691f99d417 ("drivers/perf: imx_ddr: Add support for NXP i.MX9 SoC DDRC PMU driver")
    cc: stable@xxxxxxxxxxxxxxx
    Signed-off-by: Xu Yang <xu.yang_2@xxxxxxx>
    Link: https://lore.kernel.org/r/20240529080358.703784-5-xu.yang_2@xxxxxxx
    Signed-off-by: Will Deacon <will@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/perf/fsl_imx9_ddr_perf.c b/drivers/perf/fsl_imx9_ddr_perf.c
index 5cf770a1bc312..4f6eade522024 100644
--- a/drivers/perf/fsl_imx9_ddr_perf.c
+++ b/drivers/perf/fsl_imx9_ddr_perf.c
@@ -476,12 +476,12 @@ static int ddr_perf_event_add(struct perf_event *event, int flags)
 	hwc->idx = counter;
 	hwc->state |= PERF_HES_STOPPED;
 
-	if (flags & PERF_EF_START)
-		ddr_perf_event_start(event, flags);
-
 	/* read trans, write trans, read beat */
 	ddr_perf_monitor_config(pmu, cfg, cfg1, cfg2);
 
+	if (flags & PERF_EF_START)
+		ddr_perf_event_start(event, flags);
+
 	return 0;
 }
 




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