Patch "s390/pci: fix CPU address in MSI for directed IRQ" has been added to the 5.4-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    s390/pci: fix CPU address in MSI for directed IRQ

to the 5.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     s390-pci-fix-cpu-address-in-msi-for-directed-irq.patch
and it can be found in the queue-5.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit eb1570b580a005bd5c3a2e2076b4919d5b482af9
Author: Alexander Gordeev <agordeev@xxxxxxxxxxxxx>
Date:   Thu Nov 26 18:00:37 2020 +0100

    s390/pci: fix CPU address in MSI for directed IRQ
    
    [ Upstream commit a2bd4097b3ec242f4de4924db463a9c94530e03a ]
    
    The directed MSIs are delivered to CPUs whose address is
    written to the MSI message address. The current code assumes
    that a CPU logical number (as it is seen by the kernel)
    is also the CPU address.
    
    The above assumption is not correct, as the CPU address
    is rather the value returned by STAP instruction. That
    value does not necessarily match the kernel logical CPU
    number.
    
    Fixes: e979ce7bced2 ("s390/pci: provide support for CPU directed interrupts")
    Cc: <stable@xxxxxxxxxxxxxxx> # v5.2+
    Signed-off-by: Alexander Gordeev <agordeev@xxxxxxxxxxxxx>
    Reviewed-by: Halil Pasic <pasic@xxxxxxxxxxxxx>
    Reviewed-by: Niklas Schnelle <schnelle@xxxxxxxxxxxxx>
    Signed-off-by: Niklas Schnelle <schnelle@xxxxxxxxxxxxx>
    Signed-off-by: Heiko Carstens <hca@xxxxxxxxxxxxx>
    Stable-dep-of: ab42fcb511fd ("s390/pci: Allow allocation of more than 1 MSI interrupt")
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/s390/pci/pci_irq.c b/arch/s390/pci/pci_irq.c
index 743f257cf2cbd..75217fb63d7b3 100644
--- a/arch/s390/pci/pci_irq.c
+++ b/arch/s390/pci/pci_irq.c
@@ -103,9 +103,10 @@ static int zpci_set_irq_affinity(struct irq_data *data, const struct cpumask *de
 {
 	struct msi_desc *entry = irq_get_msi_desc(data->irq);
 	struct msi_msg msg = entry->msg;
+	int cpu_addr = smp_cpu_get_cpu_address(cpumask_first(dest));
 
 	msg.address_lo &= 0xff0000ff;
-	msg.address_lo |= (cpumask_first(dest) << 8);
+	msg.address_lo |= (cpu_addr << 8);
 	pci_write_msi_msg(data->irq, &msg);
 
 	return IRQ_SET_MASK_OK;
@@ -238,6 +239,7 @@ int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
 	unsigned long bit;
 	struct msi_desc *msi;
 	struct msi_msg msg;
+	int cpu_addr;
 	int rc, irq;
 
 	zdev->aisb = -1UL;
@@ -287,9 +289,15 @@ int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
 					 handle_percpu_irq);
 		msg.data = hwirq - bit;
 		if (irq_delivery == DIRECTED) {
+			if (msi->affinity)
+				cpu = cpumask_first(&msi->affinity->mask);
+			else
+				cpu = 0;
+			cpu_addr = smp_cpu_get_cpu_address(cpu);
+
 			msg.address_lo = zdev->msi_addr & 0xff0000ff;
-			msg.address_lo |= msi->affinity ?
-				(cpumask_first(&msi->affinity->mask) << 8) : 0;
+			msg.address_lo |= (cpu_addr << 8);
+
 			for_each_possible_cpu(cpu) {
 				airq_iv_set_data(zpci_ibv[cpu], hwirq, irq);
 			}