This is a note to let you know that I've just added the patch titled
spi: microchip-core: switch to use modern name
to the 6.6-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
spi-microchip-core-switch-to-use-modern-name.patch
and it can be found in the queue-6.6 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit 0af3cadcb2e243196154d0ec680e299a69818d6d
Author: Yang Yingliang <yangyingliang@xxxxxxxxxx>
Date: Wed Aug 23 11:29:48 2023 +0800
spi: microchip-core: switch to use modern name
[ Upstream commit 8f8bf52ed5b76fc7958b0fbe3131540aecdff8ac ]
Change legacy name master/slave to modern name host/target or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20230823033003.3407403-7-yangyingliang@xxxxxxxxxx
Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>
Stable-dep-of: 3a5e76283672 ("spi: microchip-core: fix init function not setting the master and motorola modes")
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/drivers/spi/spi-microchip-core.c b/drivers/spi/spi-microchip-core.c
index cd624872dafb8..096008d006009 100644
--- a/drivers/spi/spi-microchip-core.c
+++ b/drivers/spi/spi-microchip-core.c
@@ -249,7 +249,7 @@ static inline void mchp_corespi_set_framesize(struct mchp_corespi *spi, int bt)
static void mchp_corespi_set_cs(struct spi_device *spi, bool disable)
{
u32 reg;
- struct mchp_corespi *corespi = spi_master_get_devdata(spi->master);
+ struct mchp_corespi *corespi = spi_controller_get_devdata(spi->controller);
reg = mchp_corespi_read(corespi, REG_SLAVE_SELECT);
reg &= ~BIT(spi_get_chipselect(spi, 0));
@@ -270,11 +270,11 @@ static void mchp_corespi_set_cs(struct spi_device *spi, bool disable)
static int mchp_corespi_setup(struct spi_device *spi)
{
- struct mchp_corespi *corespi = spi_master_get_devdata(spi->master);
+ struct mchp_corespi *corespi = spi_controller_get_devdata(spi->controller);
u32 reg;
/*
- * Active high slaves need to be specifically set to their inactive
+ * Active high targets need to be specifically set to their inactive
* states during probe by adding them to the "control group" & thus
* driving their select line low.
*/
@@ -287,7 +287,7 @@ static int mchp_corespi_setup(struct spi_device *spi)
return 0;
}
-static void mchp_corespi_init(struct spi_master *master, struct mchp_corespi *spi)
+static void mchp_corespi_init(struct spi_controller *host, struct mchp_corespi *spi)
{
unsigned long clk_hz;
u32 control = mchp_corespi_read(spi, REG_CONTROL);
@@ -301,7 +301,7 @@ static void mchp_corespi_init(struct spi_master *master, struct mchp_corespi *sp
/* max. possible spi clock rate is the apb clock rate */
clk_hz = clk_get_rate(spi->clk);
- master->max_speed_hz = clk_hz;
+ host->max_speed_hz = clk_hz;
/*
* The controller must be configured so that it doesn't remove Chip
@@ -321,7 +321,7 @@ static void mchp_corespi_init(struct spi_master *master, struct mchp_corespi *sp
/*
* It is required to enable direct mode, otherwise control over the chip
* select is relinquished to the hardware. SSELOUT is enabled too so we
- * can deal with active high slaves.
+ * can deal with active high targets.
*/
spi->pending_slave_select = SSELOUT | SSEL_DIRECT;
mchp_corespi_write(spi, REG_SLAVE_SELECT, spi->pending_slave_select);
@@ -387,8 +387,8 @@ static inline void mchp_corespi_set_mode(struct mchp_corespi *spi, unsigned int
static irqreturn_t mchp_corespi_interrupt(int irq, void *dev_id)
{
- struct spi_master *master = dev_id;
- struct mchp_corespi *spi = spi_master_get_devdata(master);
+ struct spi_controller *host = dev_id;
+ struct mchp_corespi *spi = spi_controller_get_devdata(host);
u32 intfield = mchp_corespi_read(spi, REG_MIS) & 0xf;
bool finalise = false;
@@ -412,7 +412,7 @@ static irqreturn_t mchp_corespi_interrupt(int irq, void *dev_id)
if (intfield & INT_RX_CHANNEL_OVERFLOW) {
mchp_corespi_write(spi, REG_INT_CLEAR, INT_RX_CHANNEL_OVERFLOW);
finalise = true;
- dev_err(&master->dev,
+ dev_err(&host->dev,
"%s: RX OVERFLOW: rxlen: %d, txlen: %d\n", __func__,
spi->rx_len, spi->tx_len);
}
@@ -420,13 +420,13 @@ static irqreturn_t mchp_corespi_interrupt(int irq, void *dev_id)
if (intfield & INT_TX_CHANNEL_UNDERRUN) {
mchp_corespi_write(spi, REG_INT_CLEAR, INT_TX_CHANNEL_UNDERRUN);
finalise = true;
- dev_err(&master->dev,
+ dev_err(&host->dev,
"%s: TX UNDERFLOW: rxlen: %d, txlen: %d\n", __func__,
spi->rx_len, spi->tx_len);
}
if (finalise)
- spi_finalize_current_transfer(master);
+ spi_finalize_current_transfer(host);
return IRQ_HANDLED;
}
@@ -468,16 +468,16 @@ static int mchp_corespi_calculate_clkgen(struct mchp_corespi *spi,
return 0;
}
-static int mchp_corespi_transfer_one(struct spi_master *master,
+static int mchp_corespi_transfer_one(struct spi_controller *host,
struct spi_device *spi_dev,
struct spi_transfer *xfer)
{
- struct mchp_corespi *spi = spi_master_get_devdata(master);
+ struct mchp_corespi *spi = spi_controller_get_devdata(host);
int ret;
ret = mchp_corespi_calculate_clkgen(spi, (unsigned long)xfer->speed_hz);
if (ret) {
- dev_err(&master->dev, "failed to set clk_gen for target %u Hz\n", xfer->speed_hz);
+ dev_err(&host->dev, "failed to set clk_gen for target %u Hz\n", xfer->speed_hz);
return ret;
}
@@ -500,11 +500,11 @@ static int mchp_corespi_transfer_one(struct spi_master *master,
return 1;
}
-static int mchp_corespi_prepare_message(struct spi_master *master,
+static int mchp_corespi_prepare_message(struct spi_controller *host,
struct spi_message *msg)
{
struct spi_device *spi_dev = msg->spi;
- struct mchp_corespi *spi = spi_master_get_devdata(master);
+ struct mchp_corespi *spi = spi_controller_get_devdata(host);
mchp_corespi_set_framesize(spi, DEFAULT_FRAMESIZE);
mchp_corespi_set_mode(spi, spi_dev->mode);
@@ -514,32 +514,32 @@ static int mchp_corespi_prepare_message(struct spi_master *master,
static int mchp_corespi_probe(struct platform_device *pdev)
{
- struct spi_master *master;
+ struct spi_controller *host;
struct mchp_corespi *spi;
struct resource *res;
u32 num_cs;
int ret = 0;
- master = devm_spi_alloc_master(&pdev->dev, sizeof(*spi));
- if (!master)
+ host = devm_spi_alloc_host(&pdev->dev, sizeof(*spi));
+ if (!host)
return dev_err_probe(&pdev->dev, -ENOMEM,
- "unable to allocate master for SPI controller\n");
+ "unable to allocate host for SPI controller\n");
- platform_set_drvdata(pdev, master);
+ platform_set_drvdata(pdev, host);
if (of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs))
num_cs = MAX_CS;
- master->num_chipselect = num_cs;
- master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
- master->setup = mchp_corespi_setup;
- master->bits_per_word_mask = SPI_BPW_MASK(8);
- master->transfer_one = mchp_corespi_transfer_one;
- master->prepare_message = mchp_corespi_prepare_message;
- master->set_cs = mchp_corespi_set_cs;
- master->dev.of_node = pdev->dev.of_node;
+ host->num_chipselect = num_cs;
+ host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+ host->setup = mchp_corespi_setup;
+ host->bits_per_word_mask = SPI_BPW_MASK(8);
+ host->transfer_one = mchp_corespi_transfer_one;
+ host->prepare_message = mchp_corespi_prepare_message;
+ host->set_cs = mchp_corespi_set_cs;
+ host->dev.of_node = pdev->dev.of_node;
- spi = spi_master_get_devdata(master);
+ spi = spi_controller_get_devdata(host);
spi->regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
if (IS_ERR(spi->regs))
@@ -550,7 +550,7 @@ static int mchp_corespi_probe(struct platform_device *pdev)
return spi->irq;
ret = devm_request_irq(&pdev->dev, spi->irq, mchp_corespi_interrupt,
- IRQF_SHARED, dev_name(&pdev->dev), master);
+ IRQF_SHARED, dev_name(&pdev->dev), host);
if (ret)
return dev_err_probe(&pdev->dev, ret,
"could not request irq\n");
@@ -565,25 +565,25 @@ static int mchp_corespi_probe(struct platform_device *pdev)
return dev_err_probe(&pdev->dev, ret,
"failed to enable clock\n");
- mchp_corespi_init(master, spi);
+ mchp_corespi_init(host, spi);
- ret = devm_spi_register_master(&pdev->dev, master);
+ ret = devm_spi_register_controller(&pdev->dev, host);
if (ret) {
mchp_corespi_disable(spi);
clk_disable_unprepare(spi->clk);
return dev_err_probe(&pdev->dev, ret,
- "unable to register master for SPI controller\n");
+ "unable to register host for SPI controller\n");
}
- dev_info(&pdev->dev, "Registered SPI controller %d\n", master->bus_num);
+ dev_info(&pdev->dev, "Registered SPI controller %d\n", host->bus_num);
return 0;
}
static void mchp_corespi_remove(struct platform_device *pdev)
{
- struct spi_master *master = platform_get_drvdata(pdev);
- struct mchp_corespi *spi = spi_master_get_devdata(master);
+ struct spi_controller *host = platform_get_drvdata(pdev);
+ struct mchp_corespi *spi = spi_controller_get_devdata(host);
mchp_corespi_disable_ints(spi);
clk_disable_unprepare(spi->clk);
