Patch "powerpc/xmon: Fix disassembly CPU feature checks" has been added to the 5.10-stable tree

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This is a note to let you know that I've just added the patch titled

    powerpc/xmon: Fix disassembly CPU feature checks

to the 5.10-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     powerpc-xmon-fix-disassembly-cpu-feature-checks.patch
and it can be found in the queue-5.10 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit e5bab442449a34965cfd16fd2697f0a922547e64
Author: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
Date:   Thu May 9 22:12:47 2024 +1000

    powerpc/xmon: Fix disassembly CPU feature checks
    
    [ Upstream commit 14196e47c5ffe32af7ed5a51c9e421c5ea5bccce ]
    
    In the xmon disassembly code there are several CPU feature checks to
    determine what dialects should be passed to the disassembler. The
    dialect controls which instructions the disassembler will recognise.
    
    Unfortunately the checks are incorrect, because instead of passing a
    single CPU feature they are passing a mask of feature bits.
    
    For example the code:
    
      if (cpu_has_feature(CPU_FTRS_POWER5))
          dialect |= PPC_OPCODE_POWER5;
    
    Is trying to check if the system is running on a Power5 CPU. But
    CPU_FTRS_POWER5 is a mask of *all* the feature bits that are enabled on
    a Power5.
    
    In practice the test will always return true for any 64-bit CPU, because
    at least one bit in the mask will be present in the CPU_FTRS_ALWAYS
    mask.
    
    Similarly for all the other checks against CPU_FTRS_xx masks.
    
    Rather than trying to match the disassembly behaviour exactly to the
    current CPU, just differentiate between 32-bit and 64-bit, and Altivec,
    VSX and HTM.
    
    That will cause some instructions to be shown in disassembly even
    on a CPU that doesn't support them, but that's OK, objdump -d output
    has the same behaviour, and if anything it's less confusing than some
    instructions not being disassembled.
    
    Fixes: 897f112bb42e ("[POWERPC] Import updated version of ppc disassembly code for xmon")
    Signed-off-by: Michael Ellerman <mpe@xxxxxxxxxxxxxx>
    Link: https://msgid.link/20240509121248.270878-2-mpe@xxxxxxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/powerpc/xmon/ppc-dis.c b/arch/powerpc/xmon/ppc-dis.c
index 75fa98221d485..af105e1bc3fca 100644
--- a/arch/powerpc/xmon/ppc-dis.c
+++ b/arch/powerpc/xmon/ppc-dis.c
@@ -122,32 +122,21 @@ int print_insn_powerpc (unsigned long insn, unsigned long memaddr)
   bool insn_is_short;
   ppc_cpu_t dialect;
 
-  dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON
-            | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_ALTIVEC;
+  dialect = PPC_OPCODE_PPC | PPC_OPCODE_COMMON;
 
-  if (cpu_has_feature(CPU_FTRS_POWER5))
-    dialect |= PPC_OPCODE_POWER5;
+  if (IS_ENABLED(CONFIG_PPC64))
+    dialect |= PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_CELL |
+	PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 |
+	PPC_OPCODE_POWER9;
 
-  if (cpu_has_feature(CPU_FTRS_CELL))
-    dialect |= (PPC_OPCODE_CELL | PPC_OPCODE_ALTIVEC);
+  if (cpu_has_feature(CPU_FTR_TM))
+    dialect |= PPC_OPCODE_HTM;
 
-  if (cpu_has_feature(CPU_FTRS_POWER6))
-    dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC);
+  if (cpu_has_feature(CPU_FTR_ALTIVEC))
+    dialect |= PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2;
 
-  if (cpu_has_feature(CPU_FTRS_POWER7))
-    dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
-                | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX);
-
-  if (cpu_has_feature(CPU_FTRS_POWER8))
-    dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
-		| PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
-		| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX);
-
-  if (cpu_has_feature(CPU_FTRS_POWER9))
-    dialect |= (PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7
-		| PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_HTM
-		| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2
-		| PPC_OPCODE_VSX | PPC_OPCODE_VSX3);
+  if (cpu_has_feature(CPU_FTR_VSX))
+    dialect |= PPC_OPCODE_VSX | PPC_OPCODE_VSX3;
 
   /* Get the major opcode of the insn.  */
   opcode = NULL;




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