Patch "clk: qcom: gcc-sc7280: Update force mem core bit for UFS ICE clock" has been added to the 5.15-stable tree

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This is a note to let you know that I've just added the patch titled

    clk: qcom: gcc-sc7280: Update force mem core bit for UFS ICE clock

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-qcom-gcc-sc7280-update-force-mem-core-bit-for-uf.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 2cbd957d7dc8b947eb9a0b2e0bef9ebe9dff8ccc
Author: Taniya Das <quic_tdas@xxxxxxxxxxx>
Date:   Fri May 31 15:21:41 2024 +0530

    clk: qcom: gcc-sc7280: Update force mem core bit for UFS ICE clock
    
    [ Upstream commit f38467b5a920be1473710428a93c4e54b6f8a0c1 ]
    
    Update the force mem core bit for UFS ICE clock to force the core on signal
    to remain active during halt state of the clk. When retention bit of the
    clock is set the memories of the subsystem will retain the logic across
    power states.
    
    Fixes: a3cc092196ef ("clk: qcom: Add Global Clock controller (GCC) driver for SC7280")
    Signed-off-by: Taniya Das <quic_tdas@xxxxxxxxxxx>
    Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240531095142.9688-3-quic_tdas@xxxxxxxxxxx
    Signed-off-by: Bjorn Andersson <andersson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/qcom/gcc-sc7280.c b/drivers/clk/qcom/gcc-sc7280.c
index d10efbf260b7a..76d5a9f49d8e6 100644
--- a/drivers/clk/qcom/gcc-sc7280.c
+++ b/drivers/clk/qcom/gcc-sc7280.c
@@ -3573,6 +3573,9 @@ static int gcc_sc7280_probe(struct platform_device *pdev)
 	regmap_update_bits(regmap, 0x71004, BIT(0), BIT(0));
 	regmap_update_bits(regmap, 0x7100C, BIT(13), BIT(13));
 
+	/* FORCE_MEM_CORE_ON for ufs phy ice core clocks */
+	qcom_branch_set_force_mem_core(regmap, gcc_ufs_phy_ice_core_clk, true);
+
 	ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
 			ARRAY_SIZE(gcc_dfs_clocks));
 	if (ret)




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