Patch "serial: imx: Raise TX trigger level to 8" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    serial: imx: Raise TX trigger level to 8

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     serial-imx-raise-tx-trigger-level-to-8.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 1f756a46d19240f0a913e0b96e3eb93f9155e17f
Author: Matthias Schiffer <matthias.schiffer@xxxxxxxxxxxxxxx>
Date:   Wed May 8 15:37:44 2024 +0200

    serial: imx: Raise TX trigger level to 8
    
    [ Upstream commit a3d8728ab079951741efa11360df43dbfacba7ab ]
    
    At the default TX trigger level of 2 in non-DMA mode (meaning that an
    interrupt is generated when less than 2 characters are left in the
    FIFO), we have observed frequent buffer underruns at 115200 Baud on an
    i.MX8M Nano. This can cause communication issues if the receiving side
    expects a continuous transfer.
    
    Increasing the level to 8 makes the UART trigger an interrupt earlier,
    giving the kernel enough time to refill the FIFO, at the cost of
    triggering one interrupt per ~24 instead of ~30 bytes of transmitted
    data (as the i.MX UART has a 32 byte FIFO).
    
    Signed-off-by: Michael Krummsdorf <michael.krummsdorf@xxxxxxxxxxxx>
    Signed-off-by: Matthias Schiffer <matthias.schiffer@xxxxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240508133744.35858-1-matthias.schiffer@xxxxxxxxxxxxxxx
    Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 285e0e1144c4c..a5d0df2ba5c55 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -1320,7 +1320,7 @@ static void imx_uart_clear_rx_errors(struct imx_port *sport)
 
 }
 
-#define TXTL_DEFAULT 2 /* reset default */
+#define TXTL_DEFAULT 8
 #define RXTL_DEFAULT 8 /* 8 characters or aging timer */
 #define TXTL_DMA 8 /* DMA burst setting */
 #define RXTL_DMA 9 /* DMA burst setting */




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