This is a note to let you know that I've just added the patch titled
drm/amdgpu: Update atomfirmware for DCN3.1 phy tuning and eDP caps
to the 5.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
drm-amdgpu-update-atomfirmware-for-dcn3.1-phy-tuning.patch
and it can be found in the queue-5.10 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit 75053bfdbb4d78694076e47c1e13fef25084a7bf
Author: Nicholas Kazlauskas <nicholas.kazlauskas@xxxxxxx>
Date: Wed May 19 10:38:47 2021 -0400
drm/amdgpu: Update atomfirmware for DCN3.1 phy tuning and eDP caps
[ Upstream commit 753625643e218eb72a6e7b7df87db595a446931a ]
[Why & How]
We'll need these in driver for phy tuning in DCN3.1.
Multiple eDP support also requires understanding which LCD the backlight
curve in atombios is for.
Acked-by: Huang Rui <ray.huang@xxxxxxx>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Stable-dep-of: e64e8f7c178e ("drm/amdgpu/atomfirmware: add intergrated info v2.3 table")
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h
index 6139d10f4289d..c7cfe9d9096dc 100644
--- a/drivers/gpu/drm/amd/include/atomfirmware.h
+++ b/drivers/gpu/drm/amd/include/atomfirmware.h
@@ -871,7 +871,8 @@ struct atom_bracket_layout_record
};
enum atom_display_device_tag_def{
- ATOM_DISPLAY_LCD1_SUPPORT = 0x0002, //an embedded display is either an LVDS or eDP signal type of display
+ ATOM_DISPLAY_LCD1_SUPPORT = 0x0002, //an embedded display is either an LVDS or eDP signal type of display
+ ATOM_DISPLAY_LCD2_SUPPORT = 0x0020, //second edp device tag 0x0020 for backward compability
ATOM_DISPLAY_DFP1_SUPPORT = 0x0008,
ATOM_DISPLAY_DFP2_SUPPORT = 0x0080,
ATOM_DISPLAY_DFP3_SUPPORT = 0x0200,
@@ -1365,6 +1366,59 @@ struct atom_integrated_system_info_v2_1
};
+struct atom_n6_display_phy_tuning_set {
+ uint8_t display_signal_type;
+ uint8_t phy_sel;
+ uint8_t preset_level;
+ uint8_t reserved1;
+ uint32_t reserved2;
+ uint32_t speed_upto;
+ uint8_t tx_vboost_level;
+ uint8_t tx_vreg_v2i;
+ uint8_t tx_vregdrv_byp;
+ uint8_t tx_term_cntl;
+ uint8_t tx_peak_level;
+ uint8_t tx_slew_en;
+ uint8_t tx_eq_pre;
+ uint8_t tx_eq_main;
+ uint8_t tx_eq_post;
+ uint8_t tx_en_inv_pre;
+ uint8_t tx_en_inv_post;
+ uint8_t reserved3;
+ uint32_t reserved4;
+ uint32_t reserved5;
+ uint32_t reserved6;
+};
+
+struct atom_display_phy_tuning_info {
+ struct atom_common_table_header table_header;
+ struct atom_n6_display_phy_tuning_set disp_phy_tuning[1];
+};
+
+struct atom_integrated_system_info_v2_2
+{
+ struct atom_common_table_header table_header;
+ uint32_t vbios_misc; //enum of atom_system_vbiosmisc_def
+ uint32_t gpucapinfo; //enum of atom_system_gpucapinf_def
+ uint32_t system_config;
+ uint32_t cpucapinfo;
+ uint16_t gpuclk_ss_percentage; //unit of 0.001%, 1000 mean 1%
+ uint16_t gpuclk_ss_type;
+ uint16_t dpphy_override; // bit vector, enum of atom_sysinfo_dpphy_override_def
+ uint8_t memorytype; // enum of atom_dmi_t17_mem_type_def, APU memory type indication.
+ uint8_t umachannelnumber; // number of memory channels
+ uint8_t htc_hyst_limit;
+ uint8_t htc_tmp_limit;
+ uint8_t reserved1;
+ uint8_t reserved2;
+ struct edp_info_table edp1_info;
+ struct edp_info_table edp2_info;
+ uint32_t reserved3[8];
+ struct atom_external_display_connection_info extdispconninfo;
+
+ uint32_t reserved4[189];
+};
+
// system_config
enum atom_system_vbiosmisc_def{
INTEGRATED_SYSTEM_INFO__GET_EDID_CALLBACK_FUNC_SUPPORT = 0x01,
