Patch "mmc: sdhci_am654: Fix ITAPDLY for HS400 timing" has been added to the 5.15-stable tree

[Sasha Levin <sashal@xxxxxxxxxx>]

This is a note to let you know that I've just added the patch titled

    mmc: sdhci_am654: Fix ITAPDLY for HS400 timing

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     mmc-sdhci_am654-fix-itapdly-for-hs400-timing.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit a37a62cae67d883a350e05c191fbcfe4964b3997
Author: Judith Mendez <jm@xxxxxx>
Date:   Wed Mar 20 17:38:37 2024 -0500

    mmc: sdhci_am654: Fix ITAPDLY for HS400 timing
    
    [ Upstream commit d3182932bb070e7518411fd165e023f82afd7d25 ]
    
    While STRB is currently used for DATA and CRC responses, the CMD
    responses from the device to the host still require ITAPDLY for
    HS400 timing.
    
    Currently what is stored for HS400 is the ITAPDLY from High Speed
    mode which is incorrect. The ITAPDLY for HS400 speed mode should
    be the same as ITAPDLY as HS200 timing after tuning is executed.
    Add the functionality to save ITAPDLY from HS200 tuning and save
    as HS400 ITAPDLY.
    
    Fixes: a161c45f2979 ("mmc: sdhci_am654: Enable DLL only for some speed modes")
    Signed-off-by: Judith Mendez <jm@xxxxxx>
    Acked-by: Adrian Hunter <adrian.hunter@xxxxxxxxx>
    Link: https://lore.kernel.org/r/20240320223837.959900-8-jm@xxxxxx
    Signed-off-by: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/mmc/host/sdhci_am654.c b/drivers/mmc/host/sdhci_am654.c
index 9cdc5e7889b45..230b61902e39d 100644
--- a/drivers/mmc/host/sdhci_am654.c
+++ b/drivers/mmc/host/sdhci_am654.c
@@ -300,6 +300,12 @@ static void sdhci_am654_set_clock(struct sdhci_host *host, unsigned int clock)
 	if (timing > MMC_TIMING_UHS_SDR25 && clock >= CLOCK_TOO_SLOW_HZ) {
 		sdhci_am654_setup_dll(host, clock);
 		sdhci_am654->dll_enable = true;
+
+		if (timing == MMC_TIMING_MMC_HS400) {
+			sdhci_am654->itap_del_ena[timing] = 0x1;
+			sdhci_am654->itap_del_sel[timing] = sdhci_am654->itap_del_sel[timing - 1];
+		}
+
 		sdhci_am654_write_itapdly(sdhci_am654, sdhci_am654->itap_del_sel[timing],
 					  sdhci_am654->itap_del_ena[timing]);
 	} else {
@@ -530,6 +536,9 @@ static int sdhci_am654_platform_execute_tuning(struct sdhci_host *host,
 
 	sdhci_am654_write_itapdly(sdhci_am654, itap, sdhci_am654->itap_del_ena[timing]);
 
+	/* Save ITAPDLY */
+	sdhci_am654->itap_del_sel[timing] = itap;
+
 	return 0;
 }