Patch "drm/meson: gate px_clk when setting rate" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/meson: gate px_clk when setting rate

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-meson-gate-px_clk-when-setting-rate.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 624959838aa10bf1a11a8092897f2d6b4e54609c
Author: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
Date:   Wed Apr 3 09:46:35 2024 +0200

    drm/meson: gate px_clk when setting rate
    
    [ Upstream commit 5c9837374ecf55a1fa3b7622d365a0456960270f ]
    
    Disable the px_clk when setting the rate to recover a fully
    configured and correctly reset VCLK clock tree after the rate
    is set.
    
    Fixes: 77d9e1e6b846 ("drm/meson: add support for MIPI-DSI transceiver")
    Reviewed-by: Nicolas Belin <nbelin@xxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-4-99ecdfdc87fc@xxxxxxxxxx
    Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
    Link: https://patchwork.freedesktop.org/patch/msgid/20240403-amlogic-v6-4-upstream-dsi-ccf-vim3-v12-4-99ecdfdc87fc@xxxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
index e5fe4e994f43b..72abe2057ec31 100644
--- a/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
+++ b/drivers/gpu/drm/meson/meson_dw_mipi_dsi.c
@@ -95,6 +95,7 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
 		return ret;
 	}
 
+	clk_disable_unprepare(mipi_dsi->px_clk);
 	ret = clk_set_rate(mipi_dsi->px_clk, mipi_dsi->mode->clock * 1000);
 
 	if (ret) {
@@ -103,6 +104,12 @@ static int dw_mipi_dsi_phy_init(void *priv_data)
 		return ret;
 	}
 
+	ret = clk_prepare_enable(mipi_dsi->px_clk);
+	if (ret) {
+		dev_err(mipi_dsi->dev, "Failed to enable DSI Pixel clock (ret %d)\n", ret);
+		return ret;
+	}
+
 	switch (mipi_dsi->dsi_device->format) {
 	case MIPI_DSI_FMT_RGB888:
 		dpi_data_format = DPI_COLOR_24BIT;




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