Patch "x86/tsc: Trust initial offset in architectural TSC-adjust MSRs" has been added to the 5.15-stable tree

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This is a note to let you know that I've just added the patch titled

    x86/tsc: Trust initial offset in architectural TSC-adjust MSRs

to the 5.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     x86-tsc-trust-initial-offset-in-architectural-tsc-adjust-msrs.patch
and it can be found in the queue-5.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 455f9075f14484f358b3c1d6845b4a438de198a7 Mon Sep 17 00:00:00 2001
From: Daniel J Blueman <daniel@xxxxxxxxx>
Date: Fri, 19 Apr 2024 16:51:46 +0800
Subject: x86/tsc: Trust initial offset in architectural TSC-adjust MSRs

From: Daniel J Blueman <daniel@xxxxxxxxx>

commit 455f9075f14484f358b3c1d6845b4a438de198a7 upstream.

When the BIOS configures the architectural TSC-adjust MSRs on secondary
sockets to correct a constant inter-chassis offset, after Linux brings the
cores online, the TSC sync check later resets the core-local MSR to 0,
triggering HPET fallback and leading to performance loss.

Fix this by unconditionally using the initial adjust values read from the
MSRs. Trusting the initial offsets in this architectural mechanism is a
better approach than special-casing workarounds for specific platforms.

Signed-off-by: Daniel J Blueman <daniel@xxxxxxxxx>
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Reviewed-by: Steffen Persvold <sp@xxxxxxxxxxxxx>
Reviewed-by: James Cleverdon <james.cleverdon.external@xxxxxxxxxx>
Reviewed-by: Dimitri Sivanich <sivanich@xxxxxxx>
Reviewed-by: Prarit Bhargava <prarit@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20240419085146.175665-1-daniel@xxxxxxxxx
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
 arch/x86/kernel/tsc_sync.c |    6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

--- a/arch/x86/kernel/tsc_sync.c
+++ b/arch/x86/kernel/tsc_sync.c
@@ -192,11 +192,9 @@ bool tsc_store_and_check_tsc_adjust(bool
 	cur->warned = false;
 
 	/*
-	 * If a non-zero TSC value for socket 0 may be valid then the default
-	 * adjusted value cannot assumed to be zero either.
+	 * The default adjust value cannot be assumed to be zero on any socket.
 	 */
-	if (tsc_async_resets)
-		cur->adjusted = bootval;
+	cur->adjusted = bootval;
 
 	/*
 	 * Check whether this CPU is the first in a package to come up. In


Patches currently in stable-queue which might be from daniel@xxxxxxxxx are

queue-5.15/x86-tsc-trust-initial-offset-in-architectural-tsc-adjust-msrs.patch




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