Patch "clk: renesas: r8a779a0: Fix CANFD parent clock" has been added to the 6.1-stable tree

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This is a note to let you know that I've just added the patch titled

    clk: renesas: r8a779a0: Fix CANFD parent clock

to the 6.1-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     clk-renesas-r8a779a0-fix-canfd-parent-clock.patch
and it can be found in the queue-6.1 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 48ba9174c72db5613c033d78951d8f91164db44a
Author: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Date:   Tue Apr 16 17:00:51 2024 +0200

    clk: renesas: r8a779a0: Fix CANFD parent clock
    
    [ Upstream commit 3b23118bdbd898dc2f4de8f549d598d492c42ba8 ]
    
    According to Figure 52A.1 ("RS-CANFD Module Block Diagram (in classical
    CAN mode)") in the R-Car V3U Series User’s Manual Rev. 0.5, the parent
    clock for the CANFD peripheral module clock is the S3D2 clock.
    
    Fixes: 9b621b6adff53346 ("clk: renesas: r8a779a0: Add CANFD module clock")
    Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
    Link: https://lore.kernel.org/r/aef9300f44c9141b1465343f91c5cc7303249b6e.1713279523.git.geert+renesas@xxxxxxxxx
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
index e02542ca24a06..5c908c8c5180d 100644
--- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c
@@ -139,7 +139,7 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = {
 	DEF_MOD("avb3",		214,	R8A779A0_CLK_S3D2),
 	DEF_MOD("avb4",		215,	R8A779A0_CLK_S3D2),
 	DEF_MOD("avb5",		216,	R8A779A0_CLK_S3D2),
-	DEF_MOD("canfd0",	328,	R8A779A0_CLK_CANFD),
+	DEF_MOD("canfd0",	328,	R8A779A0_CLK_S3D2),
 	DEF_MOD("csi40",	331,	R8A779A0_CLK_CSI0),
 	DEF_MOD("csi41",	400,	R8A779A0_CLK_CSI0),
 	DEF_MOD("csi42",	401,	R8A779A0_CLK_CSI0),




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