This is a note to let you know that I've just added the patch titled
pwm: meson: Use mul_u64_u64_div_u64() for frequency calculating
to the 6.8-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pwm-meson-use-mul_u64_u64_div_u64-for-frequency-calc.patch
and it can be found in the queue-6.8 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
commit f8de4b86120fe69a421c549d3c4bd53c597655c1
Author: George Stark <gnstark@xxxxxxxxxxxxxxxxx>
Date: Thu Apr 25 20:12:53 2024 +0300
pwm: meson: Use mul_u64_u64_div_u64() for frequency calculating
[ Upstream commit 32c44e1fa921aebf8a5ef9f778534a30aab39313 ]
While calculating frequency for the given period u64 numbers are
multiplied before division what can lead to overflow in theory so use
secure mul_u64_u64_div_u64() which handles overflow correctly.
Fixes: 329db102a26d ("pwm: meson: make full use of common clock framework")
Suggested-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>
Signed-off-by: George Stark <gnstark@xxxxxxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20240425171253.2752877-4-gnstark@xxxxxxxxxxxxxxxxx
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c
index 6fefa80af0a4c..52ac3277f4204 100644
--- a/drivers/pwm/pwm-meson.c
+++ b/drivers/pwm/pwm-meson.c
@@ -177,7 +177,7 @@ static int meson_pwm_calc(struct pwm_chip *chip, struct pwm_device *pwm,
dev_dbg(pwmchip_parent(chip), "fin_freq: %ld Hz\n", fin_freq);
- cnt = div_u64(fin_freq * period, NSEC_PER_SEC);
+ cnt = mul_u64_u64_div_u64(fin_freq, period, NSEC_PER_SEC);
if (cnt > 0xffff) {
dev_err(pwmchip_parent(chip), "unable to get period cnt\n");
return -EINVAL;
@@ -192,7 +192,7 @@ static int meson_pwm_calc(struct pwm_chip *chip, struct pwm_device *pwm,
channel->hi = 0;
channel->lo = cnt;
} else {
- duty_cnt = div_u64(fin_freq * duty, NSEC_PER_SEC);
+ duty_cnt = mul_u64_u64_div_u64(fin_freq, duty, NSEC_PER_SEC);
dev_dbg(pwmchip_parent(chip), "duty=%llu duty_cnt=%u\n", duty, duty_cnt);
