Patch "arm64: dts: mediatek: mt8192: Add missing gce-client-reg to mutex" has been added to the 6.6-stable tree

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This is a note to let you know that I've just added the patch titled

    arm64: dts: mediatek: mt8192: Add missing gce-client-reg to mutex

to the 6.6-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-dts-mediatek-mt8192-add-missing-gce-client-reg.patch
and it can be found in the queue-6.6 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.



commit 4ae0b223c18b1bef4b4a22c933d7189a96da2362
Author: Nícolas F. R. A. Prado <nfraprado@xxxxxxxxxxxxx>
Date:   Thu Feb 29 14:44:28 2024 -0500

    arm64: dts: mediatek: mt8192: Add missing gce-client-reg to mutex
    
    [ Upstream commit 00bcc8810d9dd69d3899a4189e2f3964f263a600 ]
    
    Add the missing mediatek,gce-client-reg property to the mutex node to
    allow it to use the GCE. This prevents the "can't parse gce-client-reg
    property" error from being printed and should result in better
    performance.
    
    Fixes: b4b75bac952b ("arm64: dts: mt8192: Add display nodes")
    Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
    Signed-off-by: Nícolas F. R. A. Prado <nfraprado@xxxxxxxxxxxxx>
    Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
    Link: https://lore.kernel.org/r/20240229-gce-client-reg-add-missing-mt8192-95-v1-1-b12c233a8a33@xxxxxxxxxxxxx
    Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@xxxxxxxxxxxxx>
    Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index f1fc14e53f8c7..b1443adc55aab 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -1412,6 +1412,7 @@ mutex: mutex@14001000 {
 			reg = <0 0x14001000 0 0x1000>;
 			interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>;
 			clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
+			mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
 			mediatek,gce-events = <CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_0>,
 					      <CMDQ_EVENT_DISP_STREAM_DONE_ENG_EVENT_1>;
 			power-domains = <&spm MT8192_POWER_DOMAIN_DISP>;




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